| /freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | realtek.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
18 MDIO or SPI.
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
22 not use the MDIO protocol. This binding defines how to specify the
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
[all …]
|
| H A D | realtek-smi.txt | 1 Realtek SMI-based Switches
4 The SMI "Simple Management Interface" is a two-wire protocol using
5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
6 not use the MDIO protocol. This binding defines how to specify the
7 SMI-based Realtek devices.
11 - compatible: must be exactly one of:
23 - mdc-gpios: GPIO line for the MDC clock line.
24 - mdio-gpios: GPIO line for the MDIO data line.
25 - reset-gpios: GPIO line for the reset signal.
28 - realtek,disable-leds: if the LED drivers are not used in the
[all …]
|
| H A D | qca8k.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...] |
| H A D | qca8k.txt | 5 - compatible: should be one of:
10 - #size-cells: must be 0
11 - #address-cells: must be 1
15 - reset-gpios: GPIO to be used to reset the whole device
21 mdio-bus each subnode describing a port needs to have a valid phandle
24 To declare the internal mdio-bus configuration, declare a mdio node in the
26 PHY is connected to. In this config a internal mdio-bus is registered and
27 the mdio MASTER is used as communication.
29 Don't use mixed external and internal mdio-bus configurations, as this is
36 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | mdio-mux-gpio.txt | 1 Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.
3 This is a special case of a MDIO bus multiplexer. One or more GPIO
8 - compatible : mdio-mux-gpio.
9 - gpios : GPIO specifiers for each GPIO line. One or more must be specified.
14 /* The parent MDIO bus. */
15 smi1: mdio@1180000001900 {
16 compatible = "cavium,octeon-3860-mdio";
17 #address-cells = <1>;
18 #size-cells = <0>;
23 An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
[all …]
|
| H A D | mdio-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. One or more GPIO
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
30 - compatible
[all …]
|
| H A D | mdio-mux.txt | 1 Common MDIO bus multiplexer/switch properties.
3 An MDIO bus multiplexer/switch will have several child busses that are
4 numbered uniquely in a device dependent manner. The nodes for an MDIO
8 - #address-cells = <1>;
9 - #size-cells = <0>;
12 - mdio-parent-bus : phandle to the parent MDIO bus.
14 - Other properties specific to the multiplexer/switch hardware.
17 - #address-cells = <1>;
18 - #size-cells = <0>;
19 - reg : The sub-bus number.
[all …]
|
| H A D | mdio-gpio.txt | 1 MDIO on GPIOs
4 - virtual,gpio-mdio
5 - microchip,mdio-smi0
7 MDC and MDIO lines connected to GPIO controllers are listed in the
10 MDC, MDIO.
12 Note: Each gpio-mdio bus should have an alias correctly numbered in "aliases"
18 mdio-gpio0 = &mdio0;
21 mdio0: mdio {
22 compatible = "virtual,mdio-gpio";
23 #address-cells = <1>;
[all …]
|
| H A D | mdio-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO on GPIOs
10 - Andrew Lunn <andrew@lunn.ch>
11 - Heiner Kallweit <hkallweit1@gmail.com>
12 - Russell King <linux@armlinux.org.uk>
15 - $ref: mdio.yaml#
20 - virtual,mdio-gpio
[all …]
|
| H A D | mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO Bus Common Properties
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
15 These are generic properties that can apply to any MDIO bus. Any
16 MDIO bus must have a list of child nodes, one per device on the
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/arm/marvell/ |
| H A D | cp110-system-controller.txt | 6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 ------
[all...] |
| /freebsd/sys/contrib/device-tree/src/arm/nxp/vf/ |
| H A D | vf610-zii-dev-rev-c.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
21 #address-cells = <1>;
[all …]
|
| H A D | vf610-zii-dev-rev-b.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio
[all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
[all …]
|
| H A D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | mscc,ocelot.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
18 The switch family is a multi-port networking switch that supports many
19 interfaces. Additionally, the device can perform pin control, MDIO buses, and
20 external GPIO expanders.
25 - mscc,vsc7512
30 "#address-cells":
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | mediatek,mt7620-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,mt7620-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
|
| H A D | ralink,rt305x-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt305x-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,rt305x-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
|
| H A D | ralink,rt3352-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt3352-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,rt3352-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
|
| H A D | ralink,rt3883-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt3883-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,rt3883-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/moxa/ |
| H A D | moxart.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
7 #include <dt-bindings/interrupt-controller/irq.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 #address-cells = <1>;
29 #size-cells = <0>;
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/gemini/ |
| H A D | gemini-dlink-dns-313.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/thermal/thermal.h>
13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
14 compatible = "dlink,dns-313", "cortina,gemini";
15 #address-cells = <1>;
16 #size-cells = <1>;
19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
[all …]
|
| H A D | gemini-sq201.dts | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
32 wakeup-source;
[all …]
|
| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | mpc8569mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "mpc8569si-pre.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&mpic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "cfi-flash";
44 bank-width = <1>;
45 device-width = <1>;
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/qcom/ |
| H A D | qcom-ipq8064-rb3011.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064.dtsi"
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/leds/common.h>
7 model = "MikroTik RB3011UiAS-RM";
14 mdio-gpio0 = &mdio0;
15 mdio-gpio1 = &mdio1;
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
[all …]
|