Lines Matching +full:mdio +full:- +full:gpio

1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "mpc8569si-pre.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&mpic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "cfi-flash";
44 bank-width = <1>;
45 device-width = <1>;
61 read-only;
64 label = "u-boot";
66 read-only;
71 #address-cells = <1>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8569mds-bcsr";
77 bcsr17: gpio-controller@11 {
78 #gpio-cells = <2>;
79 compatible = "fsl,mpc8569mds-bcsr-gpio";
81 gpio-controller;
86 compatible = "fsl,mpc8569-fcm-nand",
87 "fsl,elbc-fcm-nand";
92 compatible = "fsl,mpc8569mds-pib";
97 compatible = "fsl,mpc8569mds-pib";
105 i2c-sleep-nexus {
117 sdhci,1-bit-only;
118 bus-width = <1>;
122 num-ports = <7>;
124 qe_pio_e: gpio-controller@80 {
125 #gpio-cells = <2>;
126 compatible = "fsl,mpc8569-qe-pario-bank",
127 "fsl,mpc8323-qe-pario-bank";
129 gpio-controller;
132 qe_pio_f: gpio-controller@a0 {
133 #gpio-cells = <2>;
134 compatible = "fsl,mpc8569-qe-pario-bank",
135 "fsl,mpc8323-qe-pario-bank";
137 gpio-controller;
141 pio-map = <
161 pio-map = <
181 pio-map = <
201 pio-map = <
228 mode = "cpu-qe";
230 serial-flash@0 {
233 spi-max-frequency = <25000000>;
242 fsl,fullspeed-clock = "clk5";
243 fsl,lowspeed-clock = "brg10";
256 local-mac-address = [ 00 00 00 00 00 00 ];
257 rx-clock-name = "none";
258 tx-clock-name = "clk12";
259 pio-handle = <&pio1>;
260 tbi-handle = <&tbi1>;
261 phy-handle = <&qe_phy0>;
262 phy-connection-type = "rgmii-id";
265 mdio@2120 {
266 #address-cells = <1>;
267 #size-cells = <0>;
269 compatible = "fsl,ucc-mdio";
271 qe_phy0: ethernet-phy@7 {
272 interrupt-parent = <&mpic>;
276 qe_phy1: ethernet-phy@1 {
277 interrupt-parent = <&mpic>;
281 qe_phy2: ethernet-phy@2 {
282 interrupt-parent = <&mpic>;
286 qe_phy3: ethernet-phy@3 {
287 interrupt-parent = <&mpic>;
291 qe_phy5: ethernet-phy@4 {
294 qe_phy7: ethernet-phy@6 {
297 tbi1: tbi-phy@11 {
299 device_type = "tbi-phy";
302 mdio@3520 {
303 #address-cells = <1>;
304 #size-cells = <0>;
306 compatible = "fsl,ucc-mdio";
308 tbi6: tbi-phy@15 {
310 device_type = "tbi-phy";
313 mdio@3720 {
314 #address-cells = <1>;
315 #size-cells = <0>;
317 compatible = "fsl,ucc-mdio";
318 tbi8: tbi-phy@17 {
320 device_type = "tbi-phy";
327 local-mac-address = [ 00 00 00 00 00 00 ];
328 rx-clock-name = "none";
329 tx-clock-name = "clk12";
330 pio-handle = <&pio3>;
331 tbi-handle = <&tbi3>;
332 phy-handle = <&qe_phy2>;
333 phy-connection-type = "rgmii-id";
336 mdio@2320 {
337 #address-cells = <1>;
338 #size-cells = <0>;
340 compatible = "fsl,ucc-mdio";
341 tbi3: tbi-phy@11 {
343 device_type = "tbi-phy";
350 local-mac-address = [ 00 00 00 00 00 00 ];
351 rx-clock-name = "none";
352 tx-clock-name = "clk17";
353 pio-handle = <&pio2>;
354 tbi-handle = <&tbi2>;
355 phy-handle = <&qe_phy1>;
356 phy-connection-type = "rgmii-id";
359 mdio@3120 {
360 #address-cells = <1>;
361 #size-cells = <0>;
363 compatible = "fsl,ucc-mdio";
364 tbi2: tbi-phy@11 {
366 device_type = "tbi-phy";
373 local-mac-address = [ 00 00 00 00 00 00 ];
374 rx-clock-name = "none";
375 tx-clock-name = "clk17";
376 pio-handle = <&pio4>;
377 tbi-handle = <&tbi4>;
378 phy-handle = <&qe_phy3>;
379 phy-connection-type = "rgmii-id";
382 mdio@3320 {
383 #address-cells = <1>;
384 #size-cells = <0>;
386 compatible = "fsl,ucc-mdio";
387 tbi4: tbi-phy@11 {
389 device_type = "tbi-phy";
396 local-mac-address = [ 00 00 00 00 00 00 ];
397 rx-clock-name = "none";
398 tx-clock-name = "none";
399 tbi-handle = <&tbi6>;
400 phy-handle = <&qe_phy5>;
401 phy-connection-type = "sgmii";
407 local-mac-address = [ 00 00 00 00 00 00 ];
408 rx-clock-name = "none";
409 tx-clock-name = "none";
410 tbi-handle = <&tbi8>;
411 phy-handle = <&qe_phy7>;
412 phy-connection-type = "sgmii";
443 /include/ "mpc8569si-post.dtsi"