Lines Matching +full:mdio +full:- +full:gpio
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. One or more GPIO
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
30 - compatible
31 - gpios
36 - |
38 An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
39 pair of GPIO lines. Child busses 2 and 3 populated with 4
42 mdio-mux {
43 compatible = "mdio-mux-gpio";
45 mdio-parent-bus = <&smi1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
49 mdio@2 {
51 #address-cells = <1>;
52 #size-cells = <0>;
54 ethernet-phy@1 {
56 marvell,reg-init = <3 0x10 0 0x5777>,
60 interrupt-parent = <&gpio>;
63 ethernet-phy@2 {
65 marvell,reg-init = <3 0x10 0 0x5777>,
69 interrupt-parent = <&gpio>;
72 ethernet-phy@3 {
74 marvell,reg-init = <3 0x10 0 0x5777>,
78 interrupt-parent = <&gpio>;
81 ethernet-phy@4 {
83 marvell,reg-init = <3 0x10 0 0x5777>,
87 interrupt-parent = <&gpio>;
92 mdio@3 {
94 #address-cells = <1>;
95 #size-cells = <0>;
97 ethernet-phy@1 {
99 marvell,reg-init = <3 0x10 0 0x5777>,
103 interrupt-parent = <&gpio>;
106 ethernet-phy@2 {
108 marvell,reg-init = <3 0x10 0 0x5777>,
112 interrupt-parent = <&gpio>;
115 ethernet-phy@3 {
117 marvell,reg-init = <3 0x10 0 0x5777>,
121 interrupt-parent = <&gpio>;
124 ethernet-phy@4 {
126 marvell,reg-init = <3 0x10 0 0x5777>,
130 interrupt-parent = <&gpio>;