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/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,lynx-28g.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,lynx-28g.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Lynx 28G SerDes PHY
10 - Ioana Ciornei <ioana.ciornei@nxp.com>
15 - fsl,lynx-28g
20 "#phy-cells":
24 - compatible
25 - reg
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/linux/Documentation/devicetree/bindings/net/pcs/
H A Dfsl,lynx-pcs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/pcs/fsl,lynx-pcs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Lynx PCS
10 - Ioana Ciornei <ioana.ciornei@nxp.com>
13 NXP Lynx 10G and 28G SerDes have Ethernet PCS devices which can be used as
19 const: fsl,lynx-pcs
25 - compatible
26 - reg
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/linux/drivers/phy/freescale/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
54 tristate "Freescale Layerscape Lynx 28G SerDes PHY support"
59 Enable this to add support for the Lynx SerDes 28G PHY as
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) += phy-fsl-imx8mq-usb.o
3 obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) += phy-fsl-imx8qm-lvds-phy.o
4 obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o
5 obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) += phy-fsl-imx8m-pcie.o
6 obj-$(CONFIG_PHY_FSL_IMX8QM_HSIO) += phy-fsl-imx8qm-hsio.o
7 obj-$(CONFIG_PHY_FSL_LYNX_28G) += phy-fsl-lynx-28g.o
8 obj-$(CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY) += phy-fsl-samsung-hdmi.o
/linux/drivers/ata/
H A Data_piix.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ata_piix.c - Intel PATA/SATA controllers
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003-2005 Red Hat Inc
10 * Copyright 2003-2005 Jeff Garzik
14 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
15 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
19 * as Documentation/driver-api/libata.rst
40 * PIIX4 errata #9 - Only on ultra obscure hw
41 * ICH3 errata #13 - Not observed to affect real hw
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/linux/arch/alpha/kernel/
H A Dcore_t2.c1 // SPDX-License-Identifier: GPL-2.0
37 * By default, we direct-map starting at 2GB, in order to allow the
38 * maximum size direct-map window (2GB) to match the maximum amount of
41 * ISA DMA, since the maximum ISA DMA address is 2GB-1.
43 * For now, this seems a reasonable trade-off: even though most SABLEs
62 * NOTE: Herein lie back-to-back mb instructions. They are magic.
68 * BIOS32-style PCI interface:
109 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
111 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
121 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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H A Dsetup.c1 // SPDX-License-Identifier: GPL-2.0
100 * "srmcons" - early callback prints
101 * "console=srm" - full callback based console, including early prints
137 * i386-setup code. This is just enough to make the console
228 for (hose = hose_head; hose; hose = hose->next) in reserve_std_resources()
229 if (hose->index == 0) { in reserve_std_resources()
230 io = hose->io_space; in reserve_std_resources()
241 for ((_cluster) = (memdesc)->cluster, (i) = 0; \
242 (i) < (memdesc)->numclusters; (i)++, (_cluster)++)
257 } else if ( *from == 'G' || *from == 'g' ) { in get_mem_size_limit()
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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/linux/drivers/usb/host/
H A Dxhci.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/io-64-nonatomic-lo-hi.h>
20 #include <linux/io-64-nonatomic-hi-lo.h>
22 /* Code sharing between pci-quirks and xhci hcd */
23 #include "xhci-ext-caps.h"
24 #include "pci-quirks.h"
26 #include "xhci-port.h"
27 #include "xhci-caps.h"
35 /* Max number of USB devices for any host controller - limit in section 6.1 */
37 /* Section 5.3.3 - MaxPorts */
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/linux/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 /* 82562G 10/100 Network Connection
5 * 82562G-2 10/100 Network Connection
7 * 82562GT-2 10/100 Network Connection
9 * 82562V-2 10/100 Network Connection
10 * 82566DC-2 Gigabit Network Connection
12 * 82566DM-2 Gigabit Network Connection
19 * 82567LM-2 Gigabit Network Connection
20 * 82567LF-2 Gigabit Network Connection
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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