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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
[all …]
H A Dapq8016-sbc.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "msm8916-pm8916.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
14 #include <dt-bindings/sound/apq8016-lpass.h>
18 compatible = "qcom,apq8016-sbc", "qcom,apq8016";
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195-cherry-tomato-r2.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include "mt8195-cherry.dtsi"
10 compatible = "google,tomato-rev2", "google,tomato", "mediatek,mt8195";
15 realtek,btndet-delay = <16>;
19 pins-low-power-hdmi-disable {
23 input-enable;
24 bias-pull-down;
27 pins-low-power-hdmi-rsel-disable {
30 input-enable;
[all …]
H A Dmt8195-cherry-tomato-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include "mt8195-cherry.dtsi"
9 model = "Acer Tomato (rev3 - 4) board";
10 compatible = "google,tomato-rev4", "google,tomato-rev3",
16 realtek,amic-delay-ms = <250>;
20 pins-low-power-hdmi-disable {
24 input-enable;
25 bias-pull-down;
28 pins-low-power-hdmi-rsel-disable {
[all …]
H A Dmt8195-cherry-dojo-r1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include "mt8195-cherry.dtsi"
10 chassis-type = "convertible";
11 compatible = "google,dojo-sku7", "google,dojo-sku5",
12 "google,dojo-sku3", "google,dojo-sku1",
18 realtek,amic-delay-ms = <250>;
25 reset-gpios = <&pio 100 GPIO_ACTIVE_LOW>;
26 sound-name-prefix = "Right";
27 #sound-dai-cells = <0>;
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dsff,sfp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
11 - Russell King <linux@armlinux.org.uk>
16 - sff,sfp # for SFP modules
17 - sff,sff # for soldered down SFF modules
19 i2c-bus:
24 maximum-power-milliwatt:
28 Maximum module power consumption Specifies the maximum power consumption
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
[all …]
H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
17 additional Hall-effect and inductive sensing capabilities.
24 - azoteq,iqs269a
25 - azoteq,iqs269a-00
26 - azoteq,iqs269a-d0
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-sck-kv-g-revB.dtso1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
16 /dts-v1/;
20 compatible = "xlnx,zynqmp-sk-kv260-rev2",
21 "xlnx,zynqmp-sk-kv260-rev1",
[all …]
H A Dzynqmp-sck-kv-g-revA.dtso1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
9 * "A" - A01 board un-modified (NXP)
10 * "Y" - A01 board modified with legacy interposer (Nexperia)
11 * "Z" - A01 board modified with Diode interposer
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/net/ti-dp83867.h>
18 #include <dt-bindings/phy/phy.h>
19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
[all …]
H A Dzynqmp-zc1751-xm019-dc5.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm019-dc5
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm019-dc5 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
33 stdout-path = "serial0:115200n8";
[all …]
H A Dzynqmp-zc1751-xm016-dc2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm016-dc2 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
[all …]
/linux/Documentation/hwmon/
H A Dltc4282.rst1 .. SPDX-License-Identifier: GPL-2.0-only
12 Addresses scanned: - I2C 0x40 - 0x5A (7-bit)
13 Addresses scanned: - I2C 0x80 - 0xB4 with a step of 2 (8-bit)
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
25 from a live backplane. Using one or more external N-channel pass transistors,
28 power, energy and fault status. The device features analog foldback current
30 drive allows high power applications to either share safe operating area across
31 parallel MOSFETs or support a 2-stage start-up that first charges the load
32 capacitance followed by enabling a low on-resistance path to the load. The
33 LTC4282 is well suited to high power applications because the precise monitoring
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dpxa-usb.txt6 - compatible: Should be "marvell,pxa-ohci" for USB controllers
10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3"
12 - "marvell,port-mode" selects the mode of the ports:
16 - "marvell,power-sense-low" - power sense pin is low-active.
17 - "marvell,power-control-low" - power control pin is low-active.
18 - "marvell,no-oc-protection" - disable over-current protection.
19 - "marvell,oc-mode-perport" - enable per-port over-current protection.
20 - "marvell,power_on_delay" Power On to Power Good time - in ms.
25 compatible = "marvell,pxa-ohci";
28 marvell,enable-port1;
[all …]
/linux/Documentation/admin-guide/pm/
H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
9 With Intel(R) SST, one server can be configured for power and performance for a
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
25 how these commands change the power and performance profile of the system under
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
[all …]
/linux/include/linux/pinctrl/
H A Dpinconf-generic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
24 * enum pin_config_param - possible pin configuration parameters
28 * bus to change the value by driving the bus high or low and switching to
30 * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
31 * transition from say pull-up to pull-down implies that you disable
32 * pull-up in the process, this setting disables all biasing.
34 * mode, also know as "third-state" (tristate) or "high-Z" or "floating".
40 * impedance to GROUND). If the argument is != 0 pull-down is enabled,
[all …]
/linux/arch/powerpc/kernel/
H A Dirq_64.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Copyright (C) 1996-2001 Cort Dougan
9 * Adapted for Power Macintosh by Paul Mackerras
39 #include <linux/radix-tree.h>
74 WARN_ON(!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)); in next_interrupt()
79 * We are responding to the next interrupt, so interrupt-off in next_interrupt()
90 if (local_paca->irq_happened & irq) { in irq_happened_test_and_clear()
91 local_paca->irq_happened &= ~irq; in irq_happened_test_and_clear()
103 * debug_smp_processor_id() business in this low level function. in __replay_soft_interrupts()
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx93-tqma9352-mba93xxla.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/usb/pd.h>
15 #include "imx93-tqma9352.dtsi"
[all …]
H A Dimx8mn-tqma8mqnl-mba8mx-usbotg.dtso1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mn-pinfunc.h"
17 compatible = "gpio-usb-b-connector", "usb-b-connector";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_usb1_connector>;
22 id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
[all …]
/linux/arch/x86/kernel/cpu/mtrr/
H A Damd.c1 // SPDX-License-Identifier: GPL-2.0
13 unsigned long low, high; in amd_get_mtrr() local
15 rdmsr(MSR_K6_UWCCR, low, high); in amd_get_mtrr()
18 low = high; in amd_get_mtrr()
20 *base = (low & 0xFFFE0000) >> PAGE_SHIFT; in amd_get_mtrr()
22 if (low & 1) in amd_get_mtrr()
24 if (low & 2) in amd_get_mtrr()
26 if (!(low & 3)) { in amd_get_mtrr()
45 low = (~low) & 0x1FFFC; in amd_get_mtrr()
46 *size = (low + 4) << (15 - PAGE_SHIFT); in amd_get_mtrr()
[all …]
/linux/arch/arm/mach-imx/
H A Davic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
19 #include "irq-common.h"
24 #define AVIC_INTDISNUM 0x0C /* int disable number reg */
26 #define AVIC_INTENABLEL 0x14 /* int enable reg low */
28 #define AVIC_INTTYPEL 0x1C /* int type reg low */
29 #define AVIC_NIPRIORITY(x) (0x20 + 4 * (7 - (x))) /* int priority */
33 #define AVIC_INTSRCL 0x4C /* int source reg low */
35 #define AVIC_INTFRCL 0x54 /* int force reg low */
37 #define AVIC_NIPNDL 0x5C /* norm int pending low */
[all …]
/linux/arch/sparc/include/asm/
H A Dfhc.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #define CLOCK_PWRSTAT 0x30UL /* Power status */
15 #define CLOCK_PWRPRES 0x40UL /* Power presence */
18 #define CLOCK_PWRSTAT2 0x70UL /* Power status two */
31 #define FHC_RCS_POR 0x80000000 /* Last reset was a power cycle */
32 #define FHC_RCS_SPOR 0x40000000 /* Last reset was sw power on reset */
44 #define FHC_CONTROL_DCD 0x00008000 /* DC-->DC Converter Disable */
45 #define FHC_CONTROL_POFF 0x00004000 /* AC/DC Controller PLL Disable */
46 #define FHC_CONTROL_FOFF 0x00002000 /* FHC Controller PLL Disable */
47 #define FHC_CONTROL_AOFF 0x00001000 /* CPU A SRAM/SBD Low Power Mode */
[all …]
/linux/include/linux/ssb/
H A Dssb_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 #define SSB_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 …
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
53 #define SSB_GPIO_OUT_ENABLE 0xB8 /* GPIO Output Enable/Disable (pcirev >= 3 only) */
55 #define SSB_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
99 #define SSB_TMSLOW 0x0F98 /* SB Target State Low */
105 #define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
158 #define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */
168 * in two-byte quantities.
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-388-clearfog.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include "armada-388.dtsi"
9 #include "armada-38x-solidrun-microsom.dtsi"
13 /* So that mvebu u-boot can update the MAC addresses */
20 stdout-path = "serial0:115200n8";
23 reg_3p3v: regulator-3p3v {
24 compatible = "regulator-fixed";
25 regulator-name = "3P3V";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
[all …]

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