1*cbc29538SNuno Sa.. SPDX-License-Identifier: GPL-2.0-only 2*cbc29538SNuno Sa 3*cbc29538SNuno SaKernel drivers ltc4282 4*cbc29538SNuno Sa========================================== 5*cbc29538SNuno Sa 6*cbc29538SNuno SaSupported chips: 7*cbc29538SNuno Sa 8*cbc29538SNuno Sa * Analog Devices LTC4282 9*cbc29538SNuno Sa 10*cbc29538SNuno Sa Prefix: 'ltc4282' 11*cbc29538SNuno Sa 12*cbc29538SNuno Sa Addresses scanned: - I2C 0x40 - 0x5A (7-bit) 13*cbc29538SNuno Sa Addresses scanned: - I2C 0x80 - 0xB4 with a step of 2 (8-bit) 14*cbc29538SNuno Sa 15*cbc29538SNuno Sa Datasheet: 16*cbc29538SNuno Sa 17*cbc29538SNuno Sa https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf 18*cbc29538SNuno Sa 19*cbc29538SNuno SaAuthor: Nuno Sá <nuno.sa@analog.com> 20*cbc29538SNuno Sa 21*cbc29538SNuno SaDescription 22*cbc29538SNuno Sa___________ 23*cbc29538SNuno Sa 24*cbc29538SNuno SaThe LTC4282 hot swap controller allows a board to be safely inserted and removed 25*cbc29538SNuno Safrom a live backplane. Using one or more external N-channel pass transistors, 26*cbc29538SNuno Saboard supply voltage and inrush current are ramped up at an adjustable rate. An 27*cbc29538SNuno SaI2C interface and onboard ADC allows for monitoring of board current, voltage, 28*cbc29538SNuno Sapower, energy and fault status. The device features analog foldback current 29*cbc29538SNuno Salimiting and supply monitoring for applications from 2.9V to 33V. Dual 12V gate 30*cbc29538SNuno Sadrive allows high power applications to either share safe operating area across 31*cbc29538SNuno Saparallel MOSFETs or support a 2-stage start-up that first charges the load 32*cbc29538SNuno Sacapacitance followed by enabling a low on-resistance path to the load. The 33*cbc29538SNuno SaLTC4282 is well suited to high power applications because the precise monitoring 34*cbc29538SNuno Sacapability and accurate current limiting reduce the extremes in which both loads 35*cbc29538SNuno Saand power supplies must safely operate. Non-volatile configuration allows for 36*cbc29538SNuno Saflexibility in the autonomous generation of alerts and response to faults. 37*cbc29538SNuno Sa 38*cbc29538SNuno SaSysfs entries 39*cbc29538SNuno Sa_____________ 40*cbc29538SNuno Sa 41*cbc29538SNuno SaThe following attributes are supported. Limits are read-write and all the other 42*cbc29538SNuno Saattributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling 43*cbc29538SNuno Saone disables the other and disabling one enables the other. 44*cbc29538SNuno Sa 45*cbc29538SNuno Sa======================= ========================================== 46*cbc29538SNuno Sain0_input Output voltage (mV). 47*cbc29538SNuno Sain0_min Undervoltage threshold 48*cbc29538SNuno Sain0_max Overvoltage threshold 49*cbc29538SNuno Sain0_lowest Lowest measured voltage 50*cbc29538SNuno Sain0_highest Highest measured voltage 51*cbc29538SNuno Sain0_reset_history Write 1 to reset in0 history. 52*cbc29538SNuno Sa Also clears fet bad and short fault logs. 53*cbc29538SNuno Sain0_min_alarm Undervoltage alarm 54*cbc29538SNuno Sain0_max_alarm Overvoltage alarm 55*cbc29538SNuno Sain0_enable Enable/Disable VSOURCE monitoring 56*cbc29538SNuno Sain0_fault Failure in the MOSFETs. Either bad or shorted FET. 57*cbc29538SNuno Sain0_label Channel label (VSOURCE) 58*cbc29538SNuno Sa 59*cbc29538SNuno Sain1_input Input voltage (mV). 60*cbc29538SNuno Sain1_min Undervoltage threshold 61*cbc29538SNuno Sain1_max Overvoltage threshold 62*cbc29538SNuno Sain1_lowest Lowest measured voltage 63*cbc29538SNuno Sain1_highest Highest measured voltage 64*cbc29538SNuno Sain1_reset_history Write 1 to reset in1 history. 65*cbc29538SNuno Sa Also clears over/undervoltage fault logs. 66*cbc29538SNuno Sain1_min_alarm Undervoltage alarm 67*cbc29538SNuno Sain1_max_alarm Overvoltage alarm 68*cbc29538SNuno Sain1_lcrit_alarm Critical Undervoltage alarm 69*cbc29538SNuno Sain1_crit_alarm Critical Overvoltage alarm 70*cbc29538SNuno Sain1_enable Enable/Disable VDD monitoring 71*cbc29538SNuno Sain1_label Channel label (VDD) 72*cbc29538SNuno Sa 73*cbc29538SNuno Sain2_input GPIO voltage (mV) 74*cbc29538SNuno Sain2_min Undervoltage threshold 75*cbc29538SNuno Sain2_max Overvoltage threshold 76*cbc29538SNuno Sain2_lowest Lowest measured voltage 77*cbc29538SNuno Sain2_highest Highest measured voltage 78*cbc29538SNuno Sain2_reset_history Write 1 to reset in2 history 79*cbc29538SNuno Sain2_min_alarm Undervoltage alarm 80*cbc29538SNuno Sain2_max_alarm Overvoltage alarm 81*cbc29538SNuno Sain2_label Channel label (VGPIO) 82*cbc29538SNuno Sa 83*cbc29538SNuno Sacurr1_input Sense current (mA) 84*cbc29538SNuno Sacurr1_min Undercurrent threshold 85*cbc29538SNuno Sacurr1_max Overcurrent threshold 86*cbc29538SNuno Sacurr1_lowest Lowest measured current 87*cbc29538SNuno Sacurr1_highest Highest measured current 88*cbc29538SNuno Sacurr1_reset_history Write 1 to reset curr1 history. 89*cbc29538SNuno Sa Also clears overcurrent fault logs. 90*cbc29538SNuno Sacurr1_min_alarm Undercurrent alarm 91*cbc29538SNuno Sacurr1_max_alarm Overcurrent alarm 92*cbc29538SNuno Sacurr1_crit_alarm Critical Overcurrent alarm 93*cbc29538SNuno Sacurr1_label Channel label (ISENSE) 94*cbc29538SNuno Sa 95*cbc29538SNuno Sapower1_input Power (in uW) 96*cbc29538SNuno Sapower1_min Low power threshold 97*cbc29538SNuno Sapower1_max High power threshold 98*cbc29538SNuno Sapower1_input_lowest Historical minimum power use 99*cbc29538SNuno Sapower1_input_highest Historical maximum power use 100*cbc29538SNuno Sapower1_reset_history Write 1 to reset power1 history. 101*cbc29538SNuno Sa Also clears power bad fault logs. 102*cbc29538SNuno Sapower1_min_alarm Low power alarm 103*cbc29538SNuno Sapower1_max_alarm High power alarm 104*cbc29538SNuno Sapower1_label Channel label (Power) 105*cbc29538SNuno Sa 106*cbc29538SNuno Saenergy1_input Measured energy over time (in microJoule) 107*cbc29538SNuno Saenergy1_enable Enable/Disable Energy accumulation 108*cbc29538SNuno Sa======================= ========================================== 109*cbc29538SNuno Sa 110*cbc29538SNuno SaDebugFs entries 111*cbc29538SNuno Sa_______________ 112*cbc29538SNuno Sa 113*cbc29538SNuno SaThe chip also has a fault log register where failures can be logged. Hence, 114*cbc29538SNuno Saas these are logging events, we give access to them in debugfs. Note that 115*cbc29538SNuno Saeven if some failure is detected in these logs, it does necessarily mean 116*cbc29538SNuno Sathat the failure is still present. As mentioned in the proper Sysfs entries, 117*cbc29538SNuno Sathese logs can be cleared by writing in the proper reset_history attribute. 118*cbc29538SNuno Sa 119*cbc29538SNuno Sa.. warning:: The debugfs interface is subject to change without notice 120*cbc29538SNuno Sa and is only available when the kernel is compiled with 121*cbc29538SNuno Sa ``CONFIG_DEBUG_FS`` defined. 122*cbc29538SNuno Sa 123*cbc29538SNuno Sa``/sys/kernel/debug/ltc4282-hwmon[X]/`` 124*cbc29538SNuno Sacontains the following attributes: 125*cbc29538SNuno Sa 126*cbc29538SNuno Sa======================= ========================================== 127*cbc29538SNuno Sapower1_bad_fault_log Set to 1 by a power1 bad fault occurring. 128*cbc29538SNuno Sain0_fet_short_fault_log Set to 1 when the ADC detects a FET-short fault. 129*cbc29538SNuno Sain0_fet_bad_fault_log Set to 1 when a FET-BAD fault occurs. 130*cbc29538SNuno Sain1_crit_fault_log Set to 1 by a VDD overvoltage fault occurring. 131*cbc29538SNuno Sain1_lcrit_fault_log Set to 1 by a VDD undervoltage fault occurring. 132*cbc29538SNuno Sacurr1_crit_fault_log Set to 1 by an overcurrent fault occurring. 133*cbc29538SNuno Sa======================= ========================================== 134