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Searched +full:keystone +full:- +full:timer (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/devicetree/bindings/timer/
H A Dti,keystone-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ti,keystone-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI Keystone timer
10 - Alexander A. Klimov <grandmaster@al2klimov.de>
11 - Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
14 A 64-bit timer in the KeyStone architecture devices. The timer can be
15 configured as a general-purpose 64-bit timer, dual general-purpose 32-bit
16 timers. When configured as dual 32-bit timers, each half can operate in
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/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/gpio/gpio.h>
10 compatible = "ti,keystone";
11 model = "Texas Instruments Keystone 2 SoC";
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&gic>;
30 gic: interrupt-controller@2561000 {
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H A Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
13 compatible = "ti,k2g","ti,keystone";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
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/linux/Documentation/devicetree/bindings/watchdog/
H A Dti,davinci-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/ti,davinci-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI DaVinci/Keystone Watchdog Timer Controller
10 - Kousik Sanagavarapu <five231003@gmail.com>
13 TI's Watchdog Timer Controller for DaVinci and Keystone Processors.
17 Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf
18 Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
21 - $ref: watchdog.yaml#
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/linux/drivers/clocksource/
H A Dtimer-keystone.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Keystone broadcast clock-event
17 #define TIMER_NAME "timer-keystone"
19 /* Timer register offsets */
28 /* Timer register bitfields */
37 * struct keystone_timer: holds timer's data
38 * @base: timer memory base address
40 * @event_dev: event device based on timer
46 } timer; variable
50 return readl_relaxed(timer.base + rg); in keystone_timer_readl()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 bool "BCM2835 timer driver" if COMPILE_TEST
39 Enables the support for the BCM2835 timer driver.
42 bool "BCM mobile timer driver" if COMPILE_TEST
45 Enables the support for the BCM Kona mobile timer driver.
48 bool "Texas Instruments DaVinci timer driver" if COMPILE_TEST
50 Enables the support for the TI DaVinci timer driver.
53 bool "Digicolor timer driver" if COMPILE_TEST
57 Enables the support for the digicolor timer driver.
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_TIMER_OF) += timer-of.o
3 obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
5 obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
6 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += timer-atmel-tcb.o
7 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
8 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o
9 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += timer-cs5535.o
10 obj-$(CONFIG_CLKSRC_JCORE_PIT) += jcore-pit.o
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/linux/Documentation/devicetree/bindings/power/reset/
H A Dkeystone-reset.txt1 * Device tree bindings for Texas Instruments keystone reset
6 The Keystone SoCs can contain up to 4 watchdog timers to reset
7 SoC. Each watchdog timer event input is connected to the Reset Mux
14 - compatible: ti,keystone-reset
16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to
20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
26 - ti,soft-reset: Boolean option indicating soft reset.
29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related
33 begins from 0 to 3, as keystone can contain up to 4 SoC
37 Setup keystone reset so that in case software reset or
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/linux/drivers/remoteproc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
54 This can be either built-in or a loadable module.
80 use-cases to run on your platform (multimedia codecs are
87 bool "OMAP remoteproc watchdog timer"
91 Say Y here to enable watchdog timer for remote processors.
95 processors and triggers the timer interrupt upon a watchdog
105 Required for Suspend-to-RAM on AM33xx and AM43xx SoCs. Also needed
111 tristate "DA8xx/OMAP-L13x remoteproc support"
115 Say y here to support DA8xx/OMAP-L13x remote processors via the
119 use-cases to run on your platform (multimedia codecs are
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am64-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 * The MCU domain timer interrupts are routed only to the ESM module,
14 mcu_timer0: timer@4800000 {
15 compatible = "ti,am654-timer";
18 clock-names = "fck";
19 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
20 ti,timer-pwm;
24 mcu_timer1: timer@4810000 {
25 compatible = "ti,am654-timer";
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H A Dk3-am62-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 bootph-all;
11 compatible = "pinctrl-single";
13 #pinctrl-cells = <1>;
14 pinctrl-single,register-width = <32>;
15 pinctrl-single,function-mask = <0xffffffff>;
19 bootph-pre-ram;
20 compatible = "ti,j721e-esm";
23 ti,esm-pins = <0>, <1>, <2>, <85>;
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H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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/linux/drivers/watchdog/
H A Ddavinci_wdt.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2006-2013 Texas Instruments.
24 #define MODULE_NAME "DAVINCI-WDT: "
29 /* Timer register set definition */
60 * @base - base io address of WD device
61 * @clk - source clock of WDT
62 * @wdd - hold watchdog device as is in WDT core
77 wdt_freq = clk_get_rate(davinci_wdt->clk); in davinci_wdt_start()
80 iowrite32(0, davinci_wdt->base + TCR); in davinci_wdt_start()
81 /* reset timer, set mode to 64-bit watchdog, and unreset */ in davinci_wdt_start()
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/linux/drivers/net/ethernet/ti/
H A Dnetcp_ethss.c1 // SPDX-License-Identifier: GPL-2.0
3 * Keystone GBE and XGBE subsystem code
7 * Sandeep Paulraj <s-paulraj@ti.com>
10 * Wingman Kwok <w-kwok2@ti.com>
28 #define NETCP_DRIVER_NAME "TI KeyStone Ethernet Driver"
37 #define GBE_MODULE_NAME "netcp-gbe"
56 #define GBENU_MODULE_NAME "netcp-gbenu"
61 ((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \
62 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U))
65 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU)
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/linux/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
162 The ARM series is a line of low-power-consumption RISC chip designs
164 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
165 manufactured, but legacy ARM-based PC hardware remains popular in
173 relocations. The combined range is -/+ 256 MiB, which is usually
266 Patch phys-to-virt and virt-to-phys translation functions at
270 This can only be used with non-XIP MMU kernels where the base
316 bool "MMU-based Paged Memory Management Support"
319 Select if you want MMU-based virtualised addressing space
354 # This is sorted alphabetically by mach-* pathname. However, plat-*
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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H A DCREDITS1 This is at least a partial credits-file of people that have
4 scripts. The fields are: name (N), email (E), web-address
6 snail-mail address (S).
10 ----------
51 D: in-kernel DRM Maintainer
76 E: tim_alpaerts@toyota-motor-europe.com
80 S: B-2610 Wilrijk-Antwerpen
85 W: http://www-stu.christs.cam.ac.uk/~aia21/
106 D: Maintainer of ide-cd and Uniform CD-ROM driver,
107 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/drivers/pci/
H A Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
22 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
41 if (test_bit(PCI_LINK_LBMS_SEEN, &dev->priv_flags)) in pcie_lbms_seen()
102 int ret = -ENOTTY; in pcie_failed_link_retrain()
105 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
112 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
173 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
174 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
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