1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring/* 3*11621bedSNishanth Menon * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 7724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 8724ba675SRob Herring 9724ba675SRob Herring/ { 10724ba675SRob Herring compatible = "ti,keystone"; 11724ba675SRob Herring model = "Texas Instruments Keystone 2 SoC"; 12724ba675SRob Herring #address-cells = <2>; 13724ba675SRob Herring #size-cells = <2>; 14724ba675SRob Herring interrupt-parent = <&gic>; 15724ba675SRob Herring 16724ba675SRob Herring aliases { 17724ba675SRob Herring serial0 = &uart0; 18724ba675SRob Herring spi0 = &spi0; 19724ba675SRob Herring spi1 = &spi1; 20724ba675SRob Herring spi2 = &spi2; 21724ba675SRob Herring }; 22724ba675SRob Herring 23724ba675SRob Herring chosen { }; 24724ba675SRob Herring 25724ba675SRob Herring memory: memory@80000000 { 26724ba675SRob Herring device_type = "memory"; 27724ba675SRob Herring reg = <0x00000000 0x80000000 0x00000000 0x40000000>; 28724ba675SRob Herring }; 29724ba675SRob Herring 30724ba675SRob Herring gic: interrupt-controller@2561000 { 31724ba675SRob Herring compatible = "arm,gic-400", "arm,cortex-a15-gic"; 32724ba675SRob Herring #interrupt-cells = <3>; 33724ba675SRob Herring interrupt-controller; 34724ba675SRob Herring reg = <0x0 0x02561000 0x0 0x1000>, 35724ba675SRob Herring <0x0 0x02562000 0x0 0x2000>, 36724ba675SRob Herring <0x0 0x02564000 0x0 0x2000>, 37724ba675SRob Herring <0x0 0x02566000 0x0 0x2000>; 38724ba675SRob Herring interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 39724ba675SRob Herring IRQ_TYPE_LEVEL_HIGH)>; 40724ba675SRob Herring }; 41724ba675SRob Herring 42724ba675SRob Herring timer { 43724ba675SRob Herring compatible = "arm,armv7-timer"; 44724ba675SRob Herring interrupts = 45724ba675SRob Herring <GIC_PPI 13 46724ba675SRob Herring (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 47724ba675SRob Herring <GIC_PPI 14 48724ba675SRob Herring (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 49724ba675SRob Herring <GIC_PPI 11 50724ba675SRob Herring (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 51724ba675SRob Herring <GIC_PPI 10 52724ba675SRob Herring (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 53724ba675SRob Herring }; 54724ba675SRob Herring 55724ba675SRob Herring pmu { 56724ba675SRob Herring compatible = "arm,cortex-a15-pmu"; 57724ba675SRob Herring interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, 58724ba675SRob Herring <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, 59724ba675SRob Herring <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, 60724ba675SRob Herring <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>; 61724ba675SRob Herring }; 62724ba675SRob Herring 63724ba675SRob Herring psci { 64724ba675SRob Herring compatible = "arm,psci"; 65724ba675SRob Herring method = "smc"; 66724ba675SRob Herring cpu_suspend = <0x84000001>; 67724ba675SRob Herring cpu_off = <0x84000002>; 68724ba675SRob Herring cpu_on = <0x84000003>; 69724ba675SRob Herring }; 70724ba675SRob Herring 71724ba675SRob Herring soc0: soc@0 { 72724ba675SRob Herring compatible = "simple-bus"; 73724ba675SRob Herring #address-cells = <1>; 74724ba675SRob Herring #size-cells = <1>; 75724ba675SRob Herring interrupt-parent = <&gic>; 76724ba675SRob Herring ranges = <0x0 0x0 0x0 0xc0000000>; 77724ba675SRob Herring dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; 78724ba675SRob Herring 79724ba675SRob Herring pllctrl: pll-controller@2310000 { 80724ba675SRob Herring compatible = "ti,keystone-pllctrl", "syscon"; 81724ba675SRob Herring reg = <0x02310000 0x200>; 82724ba675SRob Herring }; 83724ba675SRob Herring 84724ba675SRob Herring psc: power-sleep-controller@2350000 { 85724ba675SRob Herring compatible = "syscon", "simple-mfd"; 86724ba675SRob Herring reg = <0x02350000 0x1000>; 87724ba675SRob Herring }; 88724ba675SRob Herring 89724ba675SRob Herring devctrl: device-state-control@2620000 { 90724ba675SRob Herring compatible = "ti,keystone-devctrl", "syscon", "simple-mfd"; 91724ba675SRob Herring reg = <0x02620000 0x1000>; 92724ba675SRob Herring #address-cells = <1>; 93724ba675SRob Herring #size-cells = <1>; 94724ba675SRob Herring ranges = <0x0 0x02620000 0x1000>; 95724ba675SRob Herring 96724ba675SRob Herring kirq0: keystone_irq@2a0 { 97724ba675SRob Herring compatible = "ti,keystone-irq"; 98724ba675SRob Herring reg = <0x2a0 0x4>; 99724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; 100724ba675SRob Herring interrupt-controller; 101724ba675SRob Herring #interrupt-cells = <1>; 102724ba675SRob Herring ti,syscon-dev = <&devctrl 0x2a0>; 103724ba675SRob Herring }; 104724ba675SRob Herring 105724ba675SRob Herring rstctrl: reset-controller@328 { 106724ba675SRob Herring compatible = "ti,keystone-reset"; 107724ba675SRob Herring reg = <0x328 0x10>; 108724ba675SRob Herring ti,syscon-pll = <&pllctrl 0xe4>; 109724ba675SRob Herring ti,syscon-dev = <&devctrl 0x328>; 110724ba675SRob Herring ti,wdt-list = <0>; 111724ba675SRob Herring }; 112724ba675SRob Herring }; 113724ba675SRob Herring 114724ba675SRob Herring /include/ "keystone-clocks.dtsi" 115724ba675SRob Herring 116724ba675SRob Herring uart0: serial@2530c00 { 117724ba675SRob Herring compatible = "ti,da830-uart", "ns16550a"; 118724ba675SRob Herring current-speed = <115200>; 119724ba675SRob Herring reg-shift = <2>; 120724ba675SRob Herring reg-io-width = <4>; 121724ba675SRob Herring reg = <0x02530c00 0x100>; 122724ba675SRob Herring clocks = <&clkuart0>; 123724ba675SRob Herring interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; 124724ba675SRob Herring }; 125724ba675SRob Herring 126724ba675SRob Herring uart1: serial@2531000 { 127724ba675SRob Herring compatible = "ti,da830-uart", "ns16550a"; 128724ba675SRob Herring current-speed = <115200>; 129724ba675SRob Herring reg-shift = <2>; 130724ba675SRob Herring reg-io-width = <4>; 131724ba675SRob Herring reg = <0x02531000 0x100>; 132724ba675SRob Herring clocks = <&clkuart1>; 133724ba675SRob Herring interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; 134724ba675SRob Herring }; 135724ba675SRob Herring 136724ba675SRob Herring i2c0: i2c@2530000 { 137724ba675SRob Herring compatible = "ti,davinci-i2c"; 138724ba675SRob Herring reg = <0x02530000 0x400>; 139724ba675SRob Herring clock-frequency = <100000>; 140724ba675SRob Herring clocks = <&clki2c>; 141724ba675SRob Herring interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; 142724ba675SRob Herring #address-cells = <1>; 143724ba675SRob Herring #size-cells = <0>; 144724ba675SRob Herring }; 145724ba675SRob Herring 146724ba675SRob Herring i2c1: i2c@2530400 { 147724ba675SRob Herring compatible = "ti,davinci-i2c"; 148724ba675SRob Herring reg = <0x02530400 0x400>; 149724ba675SRob Herring clock-frequency = <100000>; 150724ba675SRob Herring clocks = <&clki2c>; 151724ba675SRob Herring interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; 152724ba675SRob Herring #address-cells = <1>; 153724ba675SRob Herring #size-cells = <0>; 154724ba675SRob Herring }; 155724ba675SRob Herring 156724ba675SRob Herring i2c2: i2c@2530800 { 157724ba675SRob Herring compatible = "ti,davinci-i2c"; 158724ba675SRob Herring reg = <0x02530800 0x400>; 159724ba675SRob Herring clock-frequency = <100000>; 160724ba675SRob Herring clocks = <&clki2c>; 161724ba675SRob Herring interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; 162724ba675SRob Herring #address-cells = <1>; 163724ba675SRob Herring #size-cells = <0>; 164724ba675SRob Herring }; 165724ba675SRob Herring 166724ba675SRob Herring spi0: spi@21000400 { 167724ba675SRob Herring compatible = "ti,keystone-spi", "ti,dm6441-spi"; 168724ba675SRob Herring reg = <0x21000400 0x200>; 169724ba675SRob Herring num-cs = <4>; 170724ba675SRob Herring ti,davinci-spi-intr-line = <0>; 171724ba675SRob Herring interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; 172724ba675SRob Herring clocks = <&clkspi>; 173724ba675SRob Herring #address-cells = <1>; 174724ba675SRob Herring #size-cells = <0>; 175724ba675SRob Herring }; 176724ba675SRob Herring 177724ba675SRob Herring spi1: spi@21000600 { 178724ba675SRob Herring compatible = "ti,keystone-spi", "ti,dm6441-spi"; 179724ba675SRob Herring reg = <0x21000600 0x200>; 180724ba675SRob Herring num-cs = <4>; 181724ba675SRob Herring ti,davinci-spi-intr-line = <0>; 182724ba675SRob Herring interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; 183724ba675SRob Herring clocks = <&clkspi>; 184724ba675SRob Herring #address-cells = <1>; 185724ba675SRob Herring #size-cells = <0>; 186724ba675SRob Herring }; 187724ba675SRob Herring 188724ba675SRob Herring spi2: spi@21000800 { 189724ba675SRob Herring compatible = "ti,keystone-spi", "ti,dm6441-spi"; 190724ba675SRob Herring reg = <0x21000800 0x200>; 191724ba675SRob Herring num-cs = <4>; 192724ba675SRob Herring ti,davinci-spi-intr-line = <0>; 193724ba675SRob Herring interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; 194724ba675SRob Herring clocks = <&clkspi>; 195724ba675SRob Herring #address-cells = <1>; 196724ba675SRob Herring #size-cells = <0>; 197724ba675SRob Herring }; 198724ba675SRob Herring 199724ba675SRob Herring usb_phy: usb_phy@2620738 { 200724ba675SRob Herring compatible = "ti,keystone-usbphy"; 201724ba675SRob Herring #address-cells = <1>; 202724ba675SRob Herring #size-cells = <1>; 203724ba675SRob Herring reg = <0x2620738 24>; 204724ba675SRob Herring status = "disabled"; 205724ba675SRob Herring }; 206724ba675SRob Herring 207724ba675SRob Herring keystone_usb0: usb@2680000 { 208724ba675SRob Herring compatible = "ti,keystone-dwc3"; 209724ba675SRob Herring #address-cells = <1>; 210724ba675SRob Herring #size-cells = <1>; 211724ba675SRob Herring reg = <0x2680000 0x10000>; 212724ba675SRob Herring clocks = <&clkusb>; 213724ba675SRob Herring clock-names = "usb"; 214724ba675SRob Herring interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 215724ba675SRob Herring ranges; 216724ba675SRob Herring dma-coherent; 217724ba675SRob Herring dma-ranges; 218724ba675SRob Herring status = "disabled"; 219724ba675SRob Herring 220724ba675SRob Herring usb0: usb@2690000 { 221724ba675SRob Herring compatible = "snps,dwc3"; 222724ba675SRob Herring reg = <0x2690000 0x70000>; 223724ba675SRob Herring interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 224724ba675SRob Herring usb-phy = <&usb_phy>, <&usb_phy>; 225724ba675SRob Herring }; 226724ba675SRob Herring }; 227724ba675SRob Herring 228724ba675SRob Herring wdt: wdt@22f0080 { 229724ba675SRob Herring compatible = "ti,keystone-wdt","ti,davinci-wdt"; 230724ba675SRob Herring reg = <0x022f0080 0x80>; 231724ba675SRob Herring clocks = <&clkwdtimer0>; 232724ba675SRob Herring }; 233724ba675SRob Herring 234724ba675SRob Herring clock_event: timer@22f0000 { 235724ba675SRob Herring compatible = "ti,keystone-timer"; 236724ba675SRob Herring reg = <0x022f0000 0x80>; 237724ba675SRob Herring interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; 238724ba675SRob Herring clocks = <&clktimer15>; 239724ba675SRob Herring }; 240724ba675SRob Herring 241724ba675SRob Herring gpio0: gpio@260bf00 { 242724ba675SRob Herring compatible = "ti,keystone-gpio"; 243724ba675SRob Herring reg = <0x0260bf00 0x100>; 244724ba675SRob Herring gpio-controller; 245724ba675SRob Herring #gpio-cells = <2>; 246724ba675SRob Herring /* HW Interrupts mapped to GPIO pins */ 247724ba675SRob Herring interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, 248724ba675SRob Herring <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, 249724ba675SRob Herring <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, 250724ba675SRob Herring <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, 251724ba675SRob Herring <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, 252724ba675SRob Herring <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, 253724ba675SRob Herring <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, 254724ba675SRob Herring <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, 255724ba675SRob Herring <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, 256724ba675SRob Herring <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, 257724ba675SRob Herring <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, 258724ba675SRob Herring <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, 259724ba675SRob Herring <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, 260724ba675SRob Herring <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, 261724ba675SRob Herring <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, 262724ba675SRob Herring <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, 263724ba675SRob Herring <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, 264724ba675SRob Herring <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, 265724ba675SRob Herring <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, 266724ba675SRob Herring <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, 267724ba675SRob Herring <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, 268724ba675SRob Herring <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, 269724ba675SRob Herring <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, 270724ba675SRob Herring <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, 271724ba675SRob Herring <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, 272724ba675SRob Herring <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, 273724ba675SRob Herring <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, 274724ba675SRob Herring <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, 275724ba675SRob Herring <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, 276724ba675SRob Herring <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, 277724ba675SRob Herring <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, 278724ba675SRob Herring <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; 279724ba675SRob Herring clocks = <&clkgpio>; 280724ba675SRob Herring clock-names = "gpio"; 281724ba675SRob Herring ti,ngpio = <32>; 282724ba675SRob Herring ti,davinci-gpio-unbanked = <32>; 283724ba675SRob Herring }; 284724ba675SRob Herring 285724ba675SRob Herring aemif: aemif@21000a00 { 286724ba675SRob Herring compatible = "ti,keystone-aemif", "ti,davinci-aemif"; 287724ba675SRob Herring #address-cells = <2>; 288724ba675SRob Herring #size-cells = <1>; 289724ba675SRob Herring clocks = <&clkaemif>; 290724ba675SRob Herring clock-names = "aemif"; 291724ba675SRob Herring clock-ranges; 292724ba675SRob Herring 293724ba675SRob Herring reg = <0x21000a00 0x00000100>; 294724ba675SRob Herring ranges = <0 0 0x30000000 0x10000000 295724ba675SRob Herring 1 0 0x21000a00 0x00000100>; 296724ba675SRob Herring }; 297724ba675SRob Herring 298724ba675SRob Herring pcie0: pcie@21800000 { 299724ba675SRob Herring compatible = "ti,keystone-pcie", "snps,dw-pcie"; 300724ba675SRob Herring clocks = <&clkpcie>; 301724ba675SRob Herring clock-names = "pcie"; 302724ba675SRob Herring #address-cells = <3>; 303724ba675SRob Herring #size-cells = <2>; 304724ba675SRob Herring reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>; 305724ba675SRob Herring ranges = <0x82000000 0 0x50000000 0x50000000 306724ba675SRob Herring 0 0x10000000>; 307724ba675SRob Herring 308724ba675SRob Herring status = "disabled"; 309724ba675SRob Herring device_type = "pci"; 310724ba675SRob Herring num-lanes = <2>; 311724ba675SRob Herring bus-range = <0x00 0xff>; 312724ba675SRob Herring 313724ba675SRob Herring /* error interrupt */ 314724ba675SRob Herring interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>; 315724ba675SRob Herring #interrupt-cells = <1>; 316724ba675SRob Herring interrupt-map-mask = <0 0 0 7>; 317724ba675SRob Herring interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */ 318724ba675SRob Herring <0 0 0 2 &pcie_intc0 1>, /* INT B */ 319724ba675SRob Herring <0 0 0 3 &pcie_intc0 2>, /* INT C */ 320724ba675SRob Herring <0 0 0 4 &pcie_intc0 3>; /* INT D */ 321724ba675SRob Herring 322724ba675SRob Herring pcie_msi_intc0: msi-interrupt-controller { 323724ba675SRob Herring interrupt-controller; 324724ba675SRob Herring #interrupt-cells = <1>; 325724ba675SRob Herring interrupt-parent = <&gic>; 326724ba675SRob Herring interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, 327724ba675SRob Herring <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>, 328724ba675SRob Herring <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>, 329724ba675SRob Herring <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>, 330724ba675SRob Herring <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>, 331724ba675SRob Herring <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>, 332724ba675SRob Herring <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>, 333724ba675SRob Herring <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>; 334724ba675SRob Herring }; 335724ba675SRob Herring 336724ba675SRob Herring pcie_intc0: legacy-interrupt-controller { 337724ba675SRob Herring interrupt-controller; 338724ba675SRob Herring #interrupt-cells = <1>; 339724ba675SRob Herring interrupt-parent = <&gic>; 340724ba675SRob Herring interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>, 341724ba675SRob Herring <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>, 342724ba675SRob Herring <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>, 343724ba675SRob Herring <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>; 344724ba675SRob Herring }; 345724ba675SRob Herring }; 346724ba675SRob Herring 347724ba675SRob Herring emif: emif@21010000 { 348724ba675SRob Herring compatible = "ti,emif-keystone"; 349724ba675SRob Herring reg = <0x21010000 0x200>; 350724ba675SRob Herring interrupts = <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>; 351724ba675SRob Herring interrupt-parent = <&gic>; 352724ba675SRob Herring }; 353724ba675SRob Herring }; 354724ba675SRob Herring}; 355