Searched +full:keystone +full:- +full:dsp +full:- +full:gpio (Results 1 – 15 of 15) sorted by relevance
/linux/arch/arm/boot/dts/ti/keystone/ |
H A D | keystone-k2hk.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Kepler/Hawking soc specific device tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/reset/ti-syscon.h> 11 compatible = "ti,k2hk", "ti,keystone"; 12 model = "Texas Instruments Keystone 2 Kepler/Hawking SoC"; 15 #address-cells = <1>; 16 #size-cells = <0>; 18 interrupt-parent = <&gic>; 21 compatible = "arm,cortex-a15"; [all …]
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H A D | keystone-k2l.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Lamarr SoC specific device tree 5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/reset/ti-syscon.h> 11 compatible = "ti,k2l", "ti,keystone"; 12 model = "Texas Instruments Keystone 2 Lamarr SoC"; 15 #address-cells = <1>; 16 #size-cells = <0>; 18 interrupt-parent = <&gic>; 21 compatible = "arm,cortex-a15"; [all …]
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H A D | keystone-k2e.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Edison soc device tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/reset/ti-syscon.h> 11 compatible = "ti,k2e", "ti,keystone"; 12 model = "Texas Instruments Keystone 2 Edison SoC"; 15 #address-cells = <1>; 16 #size-cells = <0>; 18 interrupt-parent = <&gic>; 21 compatible = "arm,cortex-a15"; [all …]
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H A D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 13 compatible = "ti,k2g","ti,keystone"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 32 #address-cells = <1>; [all …]
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H A D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Kepler/Hawking EVM device tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 9 #include "keystone.dtsi" 10 #include "keystone-k2hk.dtsi" 13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"; 14 model = "Texas Instruments Keystone 2 Kepler/Hawking EVM"; 16 reserved-memory { 17 #address-cells = <2>; [all …]
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H A D | keystone-k2g-ice.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 9 #include "keystone-k2g.dtsi" 10 #include <dt-bindings/net/ti-dp83867.h> 13 compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone"; 21 reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 26 dsp_common_memory: dsp-common-memory@81f800000 { [all …]
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | ti,keystone-dsp-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/ti,keystone-dsp-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Keystone 2 DSP GPIO controller 10 - Grygorii Strashko <grygorii.strashko@ti.com> 13 HOST OS userland running on ARM can send interrupts to DSP cores using 14 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core. 15 This is one of the component used by the IPC mechanism used on Keystone SOCs. 17 For example TCI6638K2K SoC has 8 DSP GPIO controllers: [all …]
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | ti,keystone-rproc.txt | 1 TI Keystone DSP devices 4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core 5 sub-systems that are used to offload some of the processor-intensive tasks or 8 These processor sub-systems usually contain additional sub-modules like L1 10 a dedicated local power/sleep controller etc. The DSP processor core in 11 Keystone 2 SoCs is usually a TMS320C66x CorePac processor. 13 DSP Device Node: 15 Each DSP Core sub-system is represented as a single DT node, and should also 22 -------------------- 25 - compatible: Should be one of the following, [all …]
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/linux/drivers/gpio/ |
H A D | gpio-syscon.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * SYSCON GPIO driver 9 #include <linux/gpio/driver.h> 20 /* SYSCON driver is designed to use 32-bit wide registers */ 25 * struct syscon_gpio_data - Configuration for the device. 31 * @dat_bit_offset: Offset (in bits) to the first GPIO bit. 33 * GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag). 61 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in syscon_gpio_get() 63 ret = regmap_read(priv->syscon, in syscon_gpio_get() 76 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in syscon_gpio_set() [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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H A D | k3-j784s4-j742s2-main-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-ti.h> 12 #include "k3-serdes.h" 15 serdes_refclk: clock-serdes { 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 29 compatible = "mmio-sram"; [all …]
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H A D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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H A D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 24 #address-cells = <2>; 25 #size-cells = <2>; 27 #interrupt-cells = <3>; [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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H A D | CREDITS | 1 This is at least a partial credits-file of people that have 4 scripts. The fields are: name (N), email (E), web-address 6 snail-mail address (S). 10 ---------- 51 D: in-kernel DRM Maintainer 76 E: tim_alpaerts@toyota-motor-europe.com 80 S: B-2610 Wilrijk-Antwerpen 85 W: http://www-stu.christs.cam.ac.uk/~aia21/ 106 D: Maintainer of ide-cd and Uniform CD-ROM driver, 107 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update. [all …]
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