/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,ipq5018-gcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml# 7 title: Qualcomm Global Clock & Reset Controller on IPQ5018 14 domains on IPQ5018 17 include/dt-bindings/clock/qcom,ipq5018-gcc.h 18 include/dt-bindings/reset/qcom,ipq5018-gcc.h 22 const: qcom,gcc-ipq5018 50 compatible = "qcom,gcc-ipq5018";
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H A D | qcom,a53pll.yaml | 19 - qcom,ipq5018-a53pll
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | qcom,ipq5018-tlmm.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml# 7 title: Qualcomm IPQ5018 TLMM pin controller 14 Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC. 18 const: qcom,ipq5018-tlmm 36 - $ref: "#/$defs/qcom-ipq5018-tlmm-state" 39 $ref: "#/$defs/qcom-ipq5018-tlmm-state" 43 qcom-ipq5018-tlmm-state: 100 compatible = "qcom,ipq5018-tlmm";
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | ipq5018-rdp432-c2.dts | 3 * IPQ5018 MP03.1-C2 board device tree source 10 #include "ipq5018.dtsi" 13 model = "Qualcomm Technologies, Inc. IPQ5018/AP-RDP432.1-C2"; 14 compatible = "qcom,ipq5018-rdp432-c2", "qcom,ipq5018";
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H A D | ipq5018-tplink-archer-ax55-v1.dts | 9 #include "ipq5018.dtsi" 13 compatible = "tplink,archer-ax55-v1", "qcom,ipq5018";
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H A D | Makefile | 13 dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb 14 dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | qcom,ipq5332-usb-hsphy.yaml | 15 IPQ5018, IPQ5332 SoCs. 21 - qcom,ipq5018-usb-hsphy
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/linux/Documentation/devicetree/bindings/net/ |
H A D | qcom,ipq4019-mdio.yaml | 17 - qcom,ipq5018-mdio 77 - qcom,ipq5018-mdio
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/linux/drivers/pinctrl/qcom/ |
H A D | Kconfig.msm | 26 tristate "Qualcomm Technologies, Inc. IPQ5018 pin controller driver" 31 Qualcomm Technologies Inc. IPQ5018 platform. Select this for 32 IPQ5018.
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H A D | pinctrl-ipq5018.c | 746 { .compatible = "qcom,ipq5018-tlmm", }, 753 .name = "ipq5018-tlmm", 772 MODULE_DESCRIPTION("Qualcomm Technologies Inc ipq5018 pinctrl driver");
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H A D | Makefile | 7 obj-$(CONFIG_PINCTRL_IPQ5018) += pinctrl-ipq5018.o
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/linux/drivers/net/mdio/ |
H A D | mdio-ipq4019.c | 352 /* The platform resource is provided on the chipset IPQ5018 */ in ipq4019_mdio_probe() 390 { .compatible = "qcom,ipq5018-mdio" },
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/linux/Documentation/devicetree/bindings/watchdog/ |
H A D | qcom-wdt.yaml | 21 - qcom,apss-wdt-ipq5018
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/linux/drivers/net/wireless/ath/ath11k/ |
H A D | ce.h | 53 /* CE IE registers are different for IPQ5018 */
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H A D | hw.c | 1143 /* IPQ5018 hw ops is similar to QCN9074 except for the dest ring remap */ 2073 /* Target firmware's Copy Engine configuration for IPQ5018 */ 2166 /* Map from service/endpoint to Copy Engine for IPQ5018.
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H A D | hal.h | 324 /* IPQ5018 ce registers */
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H A D | core.c | 643 .name = "ipq5018 hw1.0", 645 .dir = "IPQ5018/hw1.0",
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/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | qcom,apcs-kpss-global.yaml | 21 - qcom,ipq5018-apcs-apps-global
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/linux/Documentation/devicetree/bindings/arm/ |
H A D | qcom.yaml | 26 ipq5018 343 - qcom,ipq5018-rdp432-c2 345 - const: qcom,ipq5018
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/linux/drivers/clk/qcom/ |
H A D | apss-ipq-pll.c | 211 { .compatible = "qcom,ipq5018-a53pll", .data = &ipq5018_pll_data },
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H A D | Makefile | 33 obj-$(CONFIG_IPQ_GCC_5018) += gcc-ipq5018.o
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H A D | Kconfig | 201 tristate "IPQ5018 Global Clock Controller" 204 Support for global clock controller on ipq5018 devices.
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H A D | gcc-ipq5018.c | 11 #include <dt-bindings/clock/qcom,gcc-ipq5018.h> 12 #include <dt-bindings/reset/qcom,gcc-ipq5018.h> 3667 { .compatible = "qcom,gcc-ipq5018" }, 3707 .name = "qcom,gcc-ipq5018", 3724 MODULE_DESCRIPTION("Qualcomm Technologies, Inc. GCC IPQ5018 Driver");
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/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-m31.c | 327 { .compatible = "qcom,ipq5018-usb-hsphy", .data = &m31_ipq5018_data },
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/linux/Documentation/devicetree/bindings/net/wireless/ |
H A D | qcom,ath11k.yaml | 24 - qcom,ipq5018-wifi
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