| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,ipq5018-gcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml# 7 title: Qualcomm Global Clock & Reset Controller on IPQ5018 14 domains on IPQ5018 17 include/dt-bindings/clock/qcom,ipq5018-gcc.h 18 include/dt-bindings/reset/qcom,ipq5018-gcc.h 22 const: qcom,gcc-ipq5018 50 compatible = "qcom,gcc-ipq5018";
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| H A D | qcom,a53pll.yaml | 19 - qcom,ipq5018-a53pll
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | qcom,ipq5332-uniphy-pcie-phy.yaml | 14 PCIe and USB combo PHY found in Qualcomm IPQ5018 & IPQ5332 SoCs 19 - qcom,ipq5018-uniphy-pcie-phy 60 - qcom,ipq5018-uniphy-pcie-phy
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| H A D | qcom,ipq5332-usb-hsphy.yaml | 15 IPQ5018, IPQ5332 SoCs. 21 - qcom,ipq5018-usb-hsphy
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | qcom,ipq4019-mdio.yaml | 17 - qcom,ipq5018-mdio 77 - qcom,ipq5018-mdio
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| H A D | qca,ar803x.yaml | 29 const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC 165 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
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| /linux/drivers/net/phy/qcom/ |
| H A D | Kconfig | 10 Currently supports the AR8030, AR8031, AR8033, AR8035, IPQ5018 model
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | qcom,dwc3.yaml | 28 - qcom,ipq5018-dwc3 288 - qcom,ipq5018-dwc3 409 - qcom,ipq5018-dwc3
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| H A D | qcom,snps-dwc3.yaml | 28 - qcom,ipq5018-dwc3 274 - qcom,ipq5018-dwc3 395 - qcom,ipq5018-dwc3
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | qcom,tcsr.yaml | 44 - qcom,tcsr-ipq5018
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| /linux/drivers/net/mdio/ |
| H A D | mdio-ipq4019.c | 352 /* The platform resource is provided on the chipset IPQ5018 */ in ipq4019_mdio_probe() 390 { .compatible = "qcom,ipq5018-mdio" },
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| /linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | qcom,qfprom.yaml | 22 - qcom,ipq5018-qfprom
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| /linux/Documentation/devicetree/bindings/thermal/ |
| H A D | qcom-tsens.yaml | 43 - qcom,ipq5018-tsens 265 - qcom,ipq5018-tsens
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | qcom-wdt.yaml | 21 - qcom,apss-wdt-ipq5018
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| /linux/drivers/clk/qcom/ |
| H A D | ipq-cmn-pll.c | 53 #include <dt-bindings/clock/qcom,ipq5018-cmn-pll.h> 449 { .compatible = "qcom,ipq5018-cmn-pll", .data = &ipq5018_output_clks },
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| H A D | apss-ipq-pll.c | 209 { .compatible = "qcom,ipq5018-a53pll", .data = &ipq5018_pll_data },
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| H A D | Makefile | 39 obj-$(CONFIG_IPQ_GCC_5018) += gcc-ipq5018.o
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| H A D | Kconfig | 255 tristate "IPQ5018 Global Clock Controller" 258 Support for global clock controller on ipq5018 devices.
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| /linux/drivers/net/wireless/ath/ath11k/ |
| H A D | ce.h | 53 /* CE IE registers are different for IPQ5018 */
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| /linux/Documentation/devicetree/bindings/firmware/ |
| H A D | qcom,scm.yaml | 28 - qcom,scm-ipq5018
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| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-m31.c | 331 { .compatible = "qcom,ipq5018-usb-hsphy", .data = &m31_ipq5018_data },
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| H A D | phy-qcom-uniphy-pcie-28lp.c | 257 .compatible = "qcom,ipq5018-uniphy-pcie-phy",
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | qcom.yaml | 291 - qcom,ipq5018-rdp432-c2 293 - const: qcom,ipq5018
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | Makefile | 17 dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb 18 dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb
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| /linux/Documentation/devicetree/bindings/net/wireless/ |
| H A D | qcom,ath11k.yaml | 23 - qcom,ipq5018-wifi
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