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/linux/arch/arm/mach-imx/
H A Dmach-imx6q.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
44 * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
45 * as they are used for slots1-7 PERST#
54 if (dev->devfn != 0) in ventana_pciesw_early_fixup()
58 dw |= 0xaaa8; // GPIO1-7 outputs in ventana_pciesw_early_fixup()
62 dw |= 0xfe; // GPIO1-7 output high in ventana_pciesw_early_fixup()
84 struct regmap *gpr; in imx6q_1588_init() local
87 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-fec"); in imx6q_1588_init()
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H A Dmach-imx6sl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 struct regmap *gpr; in imx6sl_fec_init() local
23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr"); in imx6sl_fec_init()
24 if (!IS_ERR(gpr)) { in imx6sl_fec_init()
25 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
27 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
30 pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n"); in imx6sl_fec_init()
38 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sl_init_late()
64 imx6_pm_ccm_init("fsl,imx6sl-ccm"); in imx6sl_init_irq()
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H A Dmach-imx7d.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
40 struct regmap *gpr; in imx7d_enet_clk_sel() local
42 gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr"); in imx7d_enet_clk_sel()
43 if (!IS_ERR(gpr)) { in imx7d_enet_clk_sel()
44 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); in imx7d_enet_clk_sel()
45 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); in imx7d_enet_clk_sel()
47 pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n"); in imx7d_enet_clk_sel()
66 platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0); in imx7d_init_late()
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8m-pcie.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
20 #include <dt-bindings/phy/phy-imx8-pcie.h>
55 const char *gpr; member
79 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
80 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on()
82 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
84 /* Tune PHY de-emphasis setting to pass PCIe compliance. */ in imx8_pcie_phy_power_on()
85 if (imx8_phy->tx_deemph_gen1) in imx8_pcie_phy_power_on()
86 writel(imx8_phy->tx_deemph_gen1, in imx8_pcie_phy_power_on()
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/linux/drivers/pci/controller/dwc/
H A Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
37 #include "pcie-designware.h"
82 #define to_imx_pcie(x) dev_get_drvdata((x)->dev)
118 #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
129 const char *gpr; member
183 /* PCIe Port Logic registers (memory-mapped) */
196 /* PHY registers (not memory-mapped) */
233 WARN_ON(imx_pcie->drvdata->variant != IMX8MQ && in imx_pcie_grp_offset()
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/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
25 reg-io-width:
31 clock-names:
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H A Dfsl,imx6q-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The LVDS Display Bridge device tree node contains up to two lvds-channel
14 - Frank Li <Frank.Li@nxp.com>
19 - enum:
20 - fsl,imx53-ldb
21 - items:
22 - enum:
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx27-pinctrl.txt4 - compatible: "fsl,imx27-iomuxc"
6 The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.
9 - fsl,pins: three integers array, represents a group of pins mux and config
21 0 - Primary function
22 1 - Alternate function
23 2 - GPIO
24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
28 0 - Input
29 1 - Output
37 0 - A_IN
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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H A Dimx6dl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
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H A Dimx53.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx53-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
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H A Dimx6q.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6q-pinfunc.h"
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a9";
23 next-level-cache = <&L2>;
24 operating-points = <
32 fsl,soc-operating-points = <
33 /* ARM kHz SOC-PU uV */
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/linux/drivers/ata/
H A Dahci_imx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
21 #include <linux/hwmon-sysfs.h>
26 #define DRV_NAME "ahci-imx"
29 /* Timer 1-ms Register */
67 struct regmap *gpr; member
79 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
103 } while (--timeout); in imx_phy_crbit_assert()
105 return timeout ? 0 : -ETIMEDOUT; in imx_phy_crbit_assert()
193 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_phy_reset()
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/linux/drivers/bus/
H A Dimx-weim.c19 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
78 { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
80 { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
82 { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
83 { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
85 { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
92 struct device_node *np = pdev->dev.of_node; in imx_weim_gpr_setup()
95 struct regmap *gpr; in imx_weim_gpr_setup() local
107 gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr"); in imx_weim_gpr_setup()
108 if (IS_ERR(gpr)) { in imx_weim_gpr_setup()
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/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imxrt1050.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "pinctrl-imx.h"
283 .gpr_compatible = "fsl,imxrt1050-iomuxc-gpr",
287 { .compatible = "fsl,imxrt1050-iomuxc", .data = &imxrt1050_pinctrl_info, },
298 .name = "imxrt1050-pinctrl",
H A Dpinctrl-imx93.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "pinctrl-imx.h"
243 .gpr_compatible = "fsl,imx93-iomuxc-gpr",
247 { .compatible = "fsl,imx93-iomuxc", },
259 .name = "imx93-pinctrl",
H A Dpinctrl-imx6ul.c1 // SPDX-License-Identifier: GPL-2.0
15 #include "pinctrl-imx.h"
316 .gpr_compatible = "fsl,imx6ul-iomuxc-gpr",
326 { .compatible = "fsl,imx6ul-iomuxc", .data = &imx6ul_pinctrl_info, },
327 { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = &imx6ull_snvs_pinctrl_info, },
335 pinctrl_info = of_device_get_match_data(&pdev->dev); in imx6ul_pinctrl_probe()
337 return -ENODEV; in imx6ul_pinctrl_probe()
344 .name = "imx6ul-pinctrl",
H A Dpinctrl-imxrt1170.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "pinctrl-imx.h"
323 .gpr_compatible = "fsl,imxrt1170-iomuxc-gpr",
327 { .compatible = "fsl,imxrt1170-iomuxc", .data = &imxrt1170_pinctrl_info, },
338 .name = "imxrt1170-pinctrl",
H A Dpinctrl-imx7d.c1 // SPDX-License-Identifier: GPL-2.0
6 // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
15 #include "pinctrl-imx.h"
360 .gpr_compatible = "fsl,imx7d-iomuxc-gpr",
370 { .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
371 { .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
379 pinctrl_info = of_device_get_match_data(&pdev->dev); in imx7d_pinctrl_probe()
381 return -ENODEV; in imx7d_pinctrl_probe()
388 .name = "imx7d-pinctrl",
H A Dpinctrl-imx8mm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2017-2018 NXP
13 #include "pinctrl-imx.h"
323 .gpr_compatible = "fsl,imx8mm-iomuxc-gpr",
327 { .compatible = "fsl,imx8mm-iomuxc", .data = &imx8mm_pinctrl_info, },
339 .name = "imx8mm-pinctrl",
H A Dpinctrl-imx6sll.c1 // SPDX-License-Identifier: GPL-2.0
4 // Copyright 2017-2018 NXP.
14 #include "pinctrl-imx.h"
332 .gpr_compatible = "fsl,imx6sll-iomuxc-gpr",
336 { .compatible = "fsl,imx6sll-iomuxc", .data = &imx6sll_pinctrl_info, },
347 .name = "imx6sll-pinctrl",
/linux/drivers/gpu/drm/imx/ipuv3/
H A Ddw_hdmi-imx.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
14 #include <video/imx-ipu-v3.h>
25 #include "imx-drm.h"
43 return container_of(e, struct imx_hdmi_encoder, encoder)->hdmi; in enc_to_imx_hdmi()
113 int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder); in dw_hdmi_imx_encoder_enable()
115 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3, in dw_hdmi_imx_encoder_enable()
126 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24; in dw_hdmi_imx_atomic_check()
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/linux/sound/soc/fsl/
H A Dfsl_mqs.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
34 TYPE_REG_GPR, /* register in GPR space */
39 * struct fsl_mqs_soc_data - soc specific data
86 mqs_priv->soc->ctrl_off == reg) in fsl_mqs_sm_read()
87 return scmi_imx_misc_ctrl_get(mqs_priv->soc->sm_index, &num, val); in fsl_mqs_sm_read()
89 return -EINVAL; in fsl_mqs_sm_read()
97 mqs_priv->soc->ctrl_off == reg) in fsl_mqs_sm_write()
98 return scmi_imx_misc_ctrl_set(mqs_priv->soc->sm_index, val); in fsl_mqs_sm_write()
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/linux/drivers/gpu/ipu-v3/
H A Dipu-prg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2017 Lucas Stach, Pengutronix
11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
17 #include <video/imx-ipu-v3.h>
19 #include "ipu-prv.h"
87 struct device_node *prg_node = of_parse_phandle(dev->of_node, in ipu_prg_lookup_by_phandle()
93 if (prg_node == prg->dev->of_node) { in ipu_prg_lookup_by_phandle()
95 device_link_add(dev, prg->dev, in ipu_prg_lookup_by_phandle()
97 prg->id = ipu_id; in ipu_prg_lookup_by_phandle()
117 if (ipu->prg_priv) in ipu_prg_present()
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