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/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel
23 - jedec,lpddr4-channel
24 - jedec,lpddr5-channel
26 io-width:
[all …]
H A Djedec,lpddr4.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR4 SDRAM compliant to JEDEC JESD209-4
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$"
19 - const: jedec,lpddr4
22 - compatible
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap-zoom-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include "omap-gpmc-smsc911x.dtsi"
19 reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
20 bank-width = <2>;
21 reg-shift = <1>;
22 reg-io-width = <1>;
23 interrupt-parent = <&gpio4>;
25 clock-frequency = <1843200>;
26 current-speed = <115200>;
27 gpmc,mux-add-data = <0>;
[all …]
/linux/arch/arm64/boot/dts/realtek/
H A Drtd129x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5 * Copyright (c) 2016-2019 Andreas Färber
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/realtek,rtd1295.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
H A Drtd139x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/realtek,rtd1295.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
34 no-map;
[all …]
H A Drtd16xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
17 reserved-memory {
18 #address-cells = <1>;
19 #size-cells = <1>;
32 no-map;
[all …]
/linux/arch/arm/boot/dts/realtek/
H A Drtd1195.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 * Copyright (c) 2017-2019 Andreas Färber
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/realtek,rtd1195.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a7";
[all …]
/linux/sound/soc/renesas/rcar/
H A Dssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SSIU/SSI support
109 ((pos) = ((struct rsnd_ssi *)(priv)->ssi + i)); \
112 #define rsnd_ssi_get(priv, id) ((struct rsnd_ssi *)(priv->ssi) + id)
113 #define rsnd_ssi_nr(priv) ((priv)->ssi_nr)
115 #define rsnd_ssi_is_parent(ssi, io) ((ssi) == rsnd_io_to_mod_ssip(io)) argument
116 #define rsnd_ssi_is_multi_secondary(mod, io) \ argument
118 rsnd_ssi_is_run_mods(mod,io) global() argument
122 rsnd_ssi_use_busif(struct rsnd_dai_stream * io) rsnd_ssi_use_busif() argument
168 rsnd_ssi_multi_secondaries(struct rsnd_dai_stream * io) rsnd_ssi_multi_secondaries() argument
190 rsnd_ssi_run_mods(struct rsnd_dai_stream * io) rsnd_ssi_run_mods() argument
205 rsnd_ssi_multi_secondaries_runtime(struct rsnd_dai_stream * io) rsnd_ssi_multi_secondaries_runtime() argument
217 int width = rsnd_rdai_width_get(rdai); rsnd_rdai_width_to_swl() local
238 int width = rsnd_rdai_width_get(rdai); rsnd_ssi_clk_query() local
267 rsnd_ssi_master_clk_start(struct rsnd_mod * mod,struct rsnd_dai_stream * io) rsnd_ssi_master_clk_start() argument
345 rsnd_ssi_master_clk_stop(struct rsnd_mod * mod,struct rsnd_dai_stream * io) rsnd_ssi_master_clk_stop() argument
367 rsnd_ssi_config_init(struct rsnd_mod * mod,struct rsnd_dai_stream * io) rsnd_ssi_config_init() argument
377 int width; rsnd_ssi_config_init() local
474 rsnd_ssi_init(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_init() argument
504 rsnd_ssi_quit(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_quit() argument
534 rsnd_ssi_hw_params(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params) rsnd_ssi_hw_params() argument
553 rsnd_ssi_start(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_start() argument
586 rsnd_ssi_stop(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_stop() argument
630 rsnd_ssi_irq(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv,int enable) rsnd_ssi_irq() argument
674 __rsnd_ssi_interrupt(struct rsnd_mod * mod,struct rsnd_dai_stream * io) __rsnd_ssi_interrupt() argument
727 rsnd_ssi_get_status(struct rsnd_mod * mod,struct rsnd_dai_stream * io,enum rsnd_mod_type type) rsnd_ssi_get_status() argument
765 rsnd_ssi_parent_attach(struct rsnd_mod * mod,struct rsnd_dai_stream * io) rsnd_ssi_parent_attach() argument
795 rsnd_ssi_pcm_new(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct snd_soc_pcm_runtime * rtd) rsnd_ssi_pcm_new() argument
809 rsnd_ssi_common_probe(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_common_probe() argument
852 rsnd_ssi_common_remove(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_common_remove() argument
876 rsnd_ssi_pio_interrupt(struct rsnd_mod * mod,struct rsnd_dai_stream * io) rsnd_ssi_pio_interrupt() argument
919 rsnd_ssi_pio_init(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_pio_init() argument
937 rsnd_ssi_pio_pointer(struct rsnd_mod * mod,struct rsnd_dai_stream * io,snd_pcm_uframes_t * pointer) rsnd_ssi_pio_pointer() argument
964 rsnd_ssi_dma_probe(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_dma_probe() argument
987 rsnd_ssi_fallback(struct rsnd_mod * mod,struct rsnd_dai_stream * io,struct rsnd_priv * priv) rsnd_ssi_fallback() argument
1006 rsnd_ssi_dma_req(struct rsnd_dai_stream * io,struct rsnd_mod * mod) rsnd_ssi_dma_req() argument
1035 rsnd_ssi_debug_info(struct seq_file * m,struct rsnd_dai_stream * io,struct rsnd_mod * mod) rsnd_ssi_debug_info() argument
1087 rsnd_ssi_connect(struct rsnd_mod * mod,struct rsnd_dai_stream * io) rsnd_ssi_connect() argument
[all...]
/linux/Documentation/devicetree/bindings/net/can/
H A Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - const: renesas,r9a06g032-sja1000 # RZ/N1D
20 - const: renesas,rzn1-sja1000 # RZ/N1
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx27-eukrea-cpuimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
18 clk14745600: clk-uart {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <14745600>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_fec>;
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Dintel,keembay-msscam.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/intel,keembay-msscam.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
11 - Edmond J Dea <edmund.j.dea@intel.com>
21 - const: intel,keembay-msscam
22 - const: syscon
27 reg-io-width:
31 - compatible
[all …]
H A Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 in bridge/synopsys,dw-hdmi.yaml with the following device-specific
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
23 "#phy-cells":
28 - const: allwinner,sun8i-a83t-dw-hdmi
29 - const: allwinner,sun50i-h6-dw-hdmi
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Dopencores,i2c-ocores.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Korsgaard <peter@korsgaard.com>
11 - Andrew Lunn <andrew@lunn.ch>
14 - $ref: /schemas/i2c/i2c-controller.yaml#
19 - items:
20 - enum:
21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC
[all …]
/linux/arch/arm64/boot/dts/intel/
H A Dkeembay-soc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a53";
23 enable-method = "psci";
27 compatible = "arm,cortex-a53";
[all …]
/linux/arch/sh/include/mach-se/mach/
H A Dmrshpc.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/io.h>
19 * PC-Card window open in mrshpc_setup_windows()
20 * flag == COMMON/ATTRIBUTE/IO in mrshpc_setup_windows()
25 /* common mode & bus width 16bit SWAP = 1*/ in mrshpc_setup_windows()
28 /* common mode & bus width 16bit SWAP = 0*/ in mrshpc_setup_windows()
34 /* attribute mode & bus width 16bit SWAP = 1*/ in mrshpc_setup_windows()
37 /* attribute mode & bus width 16bit SWAP = 0*/ in mrshpc_setup_windows()
44 __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/ in mrshpc_setup_windows()
46 __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/ in mrshpc_setup_windows()
/linux/Documentation/devicetree/bindings/serial/
H A Dsnps-dw-apb-uart.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: serial.yaml#
14 - $ref: rs485.yaml#
16 - if:
20 - {}
21 - const: renesas,rzn1-uart
[all …]
/linux/arch/arc/boot/dts/
H A Dvdk_axs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&mb_intc>;
18 compatible = "fixed-clock";
19 clock-frequency = <50000000>;
20 #clock-cells = <0>;
24 compatible = "fixed-clock";
[all …]
/linux/include/video/
H A Ds1d13xxxfb.h4 * (c) 2005 Thibaut VARENE <varenet@parisc-linux.org>
28 #define S1DREG_GPIO_CNF0 0x0004 /* General IO Pins Configuration Register 0 */
29 #define S1DREG_GPIO_CNF1 0x0005 /* General IO Pins Configuration Register 1 */
30 #define S1DREG_GPIO_CTL0 0x0008 /* General IO Pins Control Register 0 */
31 #define S1DREG_GPIO_CTL1 0x0009 /* General IO Pins Control Register 1 */
44 #define S1DREG_LCD_DISP_HWIDTH 0x0032 /* LCD Horizontal Display Width Register: ((val)+1)*8)=pix/l…
45 #define S1DREG_LCD_NDISP_HPER 0x0034 /* LCD Horizontal Non-Display Period Register: ((val)+1)*8)=N…
47 #define S1DREG_TFT_FPLINE_PWIDTH 0x0036 /* TFT FPLINE Pulse Width Register. */
50 #define S1DREG_LCD_NDISP_VPER 0x003A /* LCD Vertical Non-Display Period Register: (val)+1=NDlines …
52 #define S1DREG_TFT_FPFRAME_PWIDTH 0x003C /* TFT FPFRAME Pulse Width Register */
[all …]
/linux/drivers/irqchip/
H A Dirq-renesas-intc-irqpin.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/io.h>
35 * SENSE is read-write 32-bit with 2-bits or 4-bits per IRQ (*)
36 * PRIO is read-write 32-bit with 4-bits per IRQ (**)
37 * SOURCE is read-only 32-bit or 8-bit with 1-bit per IRQ (***)
38 * MASK is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
39 * CLEAR is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
41 * (*) May be accessed by more than one driver instance - lock needed
42 * (**) Read-modify-write access by one driver instance - lock needed
43 * (***) Accessed by one driver instance only - no locking needed
[all …]
/linux/Documentation/devicetree/bindings/rtc/
H A Depson,rtc7301.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Epson Toyocom RTC-7301SF/DG
15 - Akinobu Mita <akinobu.mita@gmail.com>
20 - epson,rtc7301dg
21 - epson,rtc7301sf
26 reg-io-width:
28 The size (in bytes) of the IO accesses that should be performed
37 - compatible
[all …]
/linux/tools/perf/Documentation/
H A Dperf-timechart.txt1 perf-timechart(1)
5 ----
6 perf-timechart - Tool to visualize total system behavior during a workload
9 --------
14 -----------
20 but it's possible to record IO (disk, network) activity using -I argument.
25 events or IO events.
27 In IO mode, every bar has two charts: upper and lower.
34 -----------------
35 -o::
[all …]
/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <markyao0591@gmail.com>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18 - $ref: /schemas/sound/dai-common.yaml#
23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi
25 - rockchip,rk3328-dw-hdmi
[all …]
/linux/arch/arm64/boot/dts/bitmain/
H A Dbm1880.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/bitmain,bm1880-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a53";
[all …]
/linux/lib/
H A Dtrace_readwrite.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
10 #include <linux/io.h>
16 void log_write_mmio(u64 val, u8 width, volatile void __iomem *addr, in log_write_mmio() argument
19 trace_rwmmio_write(caller_addr, caller_addr0, val, width, addr); in log_write_mmio()
24 void log_post_write_mmio(u64 val, u8 width, volatile void __iomem *addr, in log_post_write_mmio() argument
27 trace_rwmmio_post_write(caller_addr, caller_addr0, val, width, addr); in log_post_write_mmio()
32 void log_read_mmio(u8 width, const volatile void __iomem *addr, in log_read_mmio() argument
35 trace_rwmmio_read(caller_addr, caller_addr0, width, addr); in log_read_mmio()
40 void log_post_read_mmio(u64 val, u8 width, const volatile void __iomem *addr, in log_post_read_mmio() argument
[all …]

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