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/linux/Documentation/devicetree/bindings/interconnect/
H A Dinterconnect.txt46 interconnects : Pairs of phandles and interconnect provider specifier to denote
55 order as the interconnects property. Consumers drivers will use
67 interconnects = <&pnoc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>;
85 interconnects = <&gnoc MASTER_APPSS_PROC 3 &mnoc SLAVE_EBI1 3>;
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml159 interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
178 interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
197 interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
247 interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
265 interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
283 interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
301 interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
H A Dnvidia,tegra20-gr3d.yaml46 interconnects:
92 interconnects:
139 interconnects:
188 interconnects:
H A Dnvidia,tegra20-dc.yaml57 interconnects: true
93 interconnects:
138 interconnects:
/linux/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-geni-qcom.yaml38 interconnects:
96 interconnects:
111 interconnects:
139 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
/linux/Documentation/devicetree/bindings/gpu/host1x/
H A Dnvidia,tegra210-nvenc.yaml53 interconnects:
87 interconnects:
102 interconnects:
131 interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVENCSRD &emc>,
H A Dnvidia,tegra210-nvjpg.yaml53 interconnects:
90 interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVJPGSRD &emc>,
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm670.dtsi44 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
71 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
93 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
115 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
137 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
159 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
181 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
203 interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,
643 interconnects = <&aggre1_noc MASTER_EMMC 0 &aggre1_noc SLAVE_A1NOC_SNOC 0>,
726 interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>;
[all …]
H A Dsdm845.dtsi104 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
133 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
157 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
181 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
205 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
229 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
253 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
277 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
1272 interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>;
1288 interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
[all …]
H A Dsc7280.dtsi208 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
237 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
261 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
285 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
309 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
333 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
357 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
381 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
1027 interconnects = <&aggre1_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>,
1110 interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
[all …]
H A Dsc8280xp.dtsi60 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
88 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
111 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
134 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
157 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
180 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
203 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
226 interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
310 interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
909 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
[all …]
H A Dsc7180.dtsi91 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
121 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
145 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
169 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
193 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
217 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
241 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
265 interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
841 interconnects = <&aggre1_noc MASTER_EMMC 0 &mc_virt SLAVE_EBI1 0>,
899 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
[all …]
H A Dx1e80100.dtsi311 interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
825 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
858 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
891 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
924 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
957 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
990 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
1023 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
1056 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
1089 interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
[all …]
H A Dsm8450.dtsi294 interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
818 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
836 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
857 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
875 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
896 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
914 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
935 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
953 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
974 interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
[all …]
/linux/drivers/net/ipa/
H A Dipa_power.c26 * interconnects (buses) it depends on are enabled. Runtime power
28 * interconnects are enabled, and if not in use to be suspended
32 * an all interconnects use a fixed average and peak bandwidth.
53 /* Initialize interconnects required for IPA operation */
77 /* All interconnects are initially disabled */ in ipa_interconnect_init()
94 /* Enable IPA power, enabling interconnects and the core clock */
/linux/Documentation/devicetree/bindings/media/
H A Dqcom,sm8250-venus.yaml46 interconnects:
93 - interconnects
125 interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
H A Dallwinner,sun8i-h3-deinterlace.yaml50 interconnects:
79 interconnects = <&mbus 9>;
/linux/Documentation/devicetree/bindings/devfreq/
H A Dnvidia,tegra30-actmon.yaml49 interconnects:
77 - interconnects
123 interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mm-vpu-blk-ctrl.yaml41 interconnects:
89 interconnects:
134 interconnects:
/linux/drivers/interconnect/
H A DKconfig5 Support for management of the on-chip interconnects.
8 managing the interconnects in a SoC.
/linux/Documentation/devicetree/bindings/iommu/
H A Dqcom,tbu.yaml30 interconnects:
64 interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi156 interconnects = <&mc TEGRA194_MEMORY_CLIENT_EQOSR &emc>,
589 interconnects = <&mc TEGRA194_MEMORY_CLIENT_APEDMAR &emc>,
1034 interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
1073 interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
1112 interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRAB &emc>,
1148 interconnects = <&mc TEGRA194_MEMORY_CLIENT_HDAR &emc>,
1274 interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVR &emc>,
1308 interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
1904 interconnects = <&mc TEGRA194_MEMORY_CLIENT_HOST1XDMAR &emc>;
1928 interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDEC1SRD &emc>,
[all …]
H A Dtegra186.dtsi63 interconnects = <&mc TEGRA186_MEMORY_CLIENT_EQOSR &emc>,
857 interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>,
887 interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>,
912 interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>,
942 interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAB &emc>,
968 interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
1001 interconnects = <&mc TEGRA186_MEMORY_CLIENT_HDAR &emc>,
1132 interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>,
1154 interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_DEVR &emc>,
1376 interconnects = <&mc TEGRA186_MEMORY_CLIENT_AFIR &emc>,
[all …]
/linux/Documentation/devicetree/bindings/serial/
H A Dqcom,serial-geni-qcom.yaml28 interconnects:
82 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml101 interconnects:
175 interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
205 interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,

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