xref: /linux/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml (revision 762f99f4f3cb41a775b5157dd761217beba65873)
1271ca53cSDmitry Osipenko# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2271ca53cSDmitry Osipenko%YAML 1.2
3271ca53cSDmitry Osipenko---
4271ca53cSDmitry Osipenko$id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
5271ca53cSDmitry Osipenko$schema: http://devicetree.org/meta-schemas/core.yaml#
6271ca53cSDmitry Osipenko
7271ca53cSDmitry Osipenkotitle: NVIDIA Tegra30 Activity Monitor
8271ca53cSDmitry Osipenko
9271ca53cSDmitry Osipenkomaintainers:
10271ca53cSDmitry Osipenko  - Dmitry Osipenko <digetx@gmail.com>
11271ca53cSDmitry Osipenko  - Jon Hunter <jonathanh@nvidia.com>
12271ca53cSDmitry Osipenko  - Thierry Reding <thierry.reding@gmail.com>
13271ca53cSDmitry Osipenko
14271ca53cSDmitry Osipenkodescription: |
15271ca53cSDmitry Osipenko  The activity monitor block collects statistics about the behaviour of other
16271ca53cSDmitry Osipenko  components in the system. This information can be used to derive the rate at
17271ca53cSDmitry Osipenko  which the external memory needs to be clocked in order to serve all requests
18271ca53cSDmitry Osipenko  from the monitored clients.
19271ca53cSDmitry Osipenko
20271ca53cSDmitry Osipenkoproperties:
21271ca53cSDmitry Osipenko  compatible:
22271ca53cSDmitry Osipenko    enum:
23271ca53cSDmitry Osipenko      - nvidia,tegra30-actmon
24271ca53cSDmitry Osipenko      - nvidia,tegra114-actmon
25271ca53cSDmitry Osipenko      - nvidia,tegra124-actmon
26271ca53cSDmitry Osipenko      - nvidia,tegra210-actmon
27271ca53cSDmitry Osipenko
28271ca53cSDmitry Osipenko  reg:
29271ca53cSDmitry Osipenko    maxItems: 1
30271ca53cSDmitry Osipenko
31271ca53cSDmitry Osipenko  clocks:
32271ca53cSDmitry Osipenko    maxItems: 2
33271ca53cSDmitry Osipenko
34271ca53cSDmitry Osipenko  clock-names:
35271ca53cSDmitry Osipenko    items:
36271ca53cSDmitry Osipenko      - const: actmon
37271ca53cSDmitry Osipenko      - const: emc
38271ca53cSDmitry Osipenko
39271ca53cSDmitry Osipenko  resets:
40271ca53cSDmitry Osipenko    maxItems: 1
41271ca53cSDmitry Osipenko
42271ca53cSDmitry Osipenko  reset-names:
43271ca53cSDmitry Osipenko    items:
44271ca53cSDmitry Osipenko      - const: actmon
45271ca53cSDmitry Osipenko
46271ca53cSDmitry Osipenko  interrupts:
47271ca53cSDmitry Osipenko    maxItems: 1
48271ca53cSDmitry Osipenko
49271ca53cSDmitry Osipenko  interconnects:
50271ca53cSDmitry Osipenko    minItems: 1
51271ca53cSDmitry Osipenko    maxItems: 12
52271ca53cSDmitry Osipenko
53271ca53cSDmitry Osipenko  interconnect-names:
54271ca53cSDmitry Osipenko    minItems: 1
55271ca53cSDmitry Osipenko    maxItems: 12
56271ca53cSDmitry Osipenko    description:
57271ca53cSDmitry Osipenko      Should include name of the interconnect path for each interconnect
58271ca53cSDmitry Osipenko      entry. Consult TRM documentation for information about available
59271ca53cSDmitry Osipenko      memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections.
60271ca53cSDmitry Osipenko
61271ca53cSDmitry Osipenko  operating-points-v2:
62271ca53cSDmitry Osipenko    description:
63271ca53cSDmitry Osipenko      Should contain freqs and voltages and opp-supported-hw property, which
64271ca53cSDmitry Osipenko      is a bitfield indicating SoC speedo ID mask.
65271ca53cSDmitry Osipenko
66*6b61f55eSDmitry Osipenko  "#cooling-cells":
67*6b61f55eSDmitry Osipenko    const: 2
68*6b61f55eSDmitry Osipenko
69271ca53cSDmitry Osipenkorequired:
70271ca53cSDmitry Osipenko  - compatible
71271ca53cSDmitry Osipenko  - reg
72271ca53cSDmitry Osipenko  - clocks
73271ca53cSDmitry Osipenko  - clock-names
74271ca53cSDmitry Osipenko  - resets
75271ca53cSDmitry Osipenko  - reset-names
76271ca53cSDmitry Osipenko  - interrupts
77271ca53cSDmitry Osipenko  - interconnects
78271ca53cSDmitry Osipenko  - interconnect-names
79271ca53cSDmitry Osipenko  - operating-points-v2
80*6b61f55eSDmitry Osipenko  - "#cooling-cells"
81271ca53cSDmitry Osipenko
82271ca53cSDmitry OsipenkoadditionalProperties: false
83271ca53cSDmitry Osipenko
84271ca53cSDmitry Osipenkoexamples:
85271ca53cSDmitry Osipenko  - |
86271ca53cSDmitry Osipenko    #include <dt-bindings/memory/tegra30-mc.h>
87271ca53cSDmitry Osipenko
88271ca53cSDmitry Osipenko    mc: memory-controller@7000f000 {
89271ca53cSDmitry Osipenko        compatible = "nvidia,tegra30-mc";
90271ca53cSDmitry Osipenko        reg = <0x7000f000 0x400>;
91271ca53cSDmitry Osipenko        clocks = <&clk 32>;
92271ca53cSDmitry Osipenko        clock-names = "mc";
93271ca53cSDmitry Osipenko
94271ca53cSDmitry Osipenko        interrupts = <0 77 4>;
95271ca53cSDmitry Osipenko
96271ca53cSDmitry Osipenko        #iommu-cells = <1>;
97271ca53cSDmitry Osipenko        #reset-cells = <1>;
98271ca53cSDmitry Osipenko        #interconnect-cells = <1>;
99271ca53cSDmitry Osipenko    };
100271ca53cSDmitry Osipenko
101271ca53cSDmitry Osipenko    emc: external-memory-controller@7000f400 {
102271ca53cSDmitry Osipenko        compatible = "nvidia,tegra30-emc";
103271ca53cSDmitry Osipenko        reg = <0x7000f400 0x400>;
104271ca53cSDmitry Osipenko        interrupts = <0 78 4>;
105271ca53cSDmitry Osipenko        clocks = <&clk 57>;
106271ca53cSDmitry Osipenko
107271ca53cSDmitry Osipenko        nvidia,memory-controller = <&mc>;
108271ca53cSDmitry Osipenko        operating-points-v2 = <&dvfs_opp_table>;
109271ca53cSDmitry Osipenko        power-domains = <&domain>;
110271ca53cSDmitry Osipenko
111271ca53cSDmitry Osipenko        #interconnect-cells = <0>;
112271ca53cSDmitry Osipenko    };
113271ca53cSDmitry Osipenko
114271ca53cSDmitry Osipenko    actmon@6000c800 {
115271ca53cSDmitry Osipenko        compatible = "nvidia,tegra30-actmon";
116271ca53cSDmitry Osipenko        reg = <0x6000c800 0x400>;
117271ca53cSDmitry Osipenko        interrupts = <0 45 4>;
118271ca53cSDmitry Osipenko        clocks = <&clk 119>, <&clk 57>;
119271ca53cSDmitry Osipenko        clock-names = "actmon", "emc";
120271ca53cSDmitry Osipenko        resets = <&rst 119>;
121271ca53cSDmitry Osipenko        reset-names = "actmon";
122271ca53cSDmitry Osipenko        operating-points-v2 = <&dvfs_opp_table>;
123271ca53cSDmitry Osipenko        interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
124271ca53cSDmitry Osipenko        interconnect-names = "cpu-read";
125*6b61f55eSDmitry Osipenko        #cooling-cells = <2>;
126271ca53cSDmitry Osipenko    };
127