/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/ |
H A D | floating-point.json | 15 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 26 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 32 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 37 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 54 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 59 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 65 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/ |
H A D | floating-point.json | 15 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 26 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 32 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 37 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 54 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 59 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 65 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/ |
H A D | floating-point.json | 14 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 20 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 25 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 31 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 36 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 42 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 47 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 53 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 58 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 64 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
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H A D | cache.json | 127 "BriefDescription": "L2 cache hits when fetching instructions, code reads.", 133 "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.", 138 "BriefDescription": "L2 cache misses when fetching instructions", 144 "PublicDescription": "Counts L2 cache misses when fetching instructions.", 155 …n": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cac… 199 …ts that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not … 210 …s that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not … 248 "BriefDescription": "All retired load instructions.", 256 …PublicDescription": "Counts all retired load instructions. This event accounts for SW prefetch ins… 261 "BriefDescription": "All retired store instructions.", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/ |
H A D | floating-point.json | 3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/ |
H A D | floating-point.json | 3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/ |
H A D | floating-point.json | 65 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 71 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 76 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 82 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 87 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 93 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 98 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 104 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 109 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 115 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/ |
H A D | floating-point.json | 3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 48 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen2/ |
H A D | core.json | 5 "BriefDescription": "Retired Instructions." 11 …ber of micro-ops retired. This count includes all processor activity (instructions, exceptions, in… 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 …"PublicDescription": "The number of branch instructions retired, of any type, that were not correc… 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen3/ |
H A D | core.json | 5 "BriefDescription": "Retired Instructions." 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 "PublicDescription": "The number of retired branch instructions, that were mispredicted." 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." 64 "BriefDescription": "Retired Indirect Branch Instructions Mispredicted.", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/ |
H A D | core.json | 5 "BriefDescription": "Retired Instructions." 11 …": "The number of uOps retired. This includes all processor activity (instructions, exceptions, in… 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 …"PublicDescription": "The number of branch instructions retired, of any type, that were not correc… 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/silvermont/ |
H A D | pipeline.json | 3 "BriefDescription": "Counts the number of branch instructions retired...", 8 …of any branch instructions retired. Branch prediction predicts the branch target and enables the … 12 "BriefDescription": "Counts the number of taken branch instructions retired", 18 … taken branch instructions retired. Branch prediction predicts the branch target and enables the … 23 "BriefDescription": "Counts the number of near CALL branch instructions retired", 28 …r CALL branch instructions retired. Branch prediction predicts the branch target and enables the … 33 "BriefDescription": "Counts the number of far branch instructions retired", 38 …of far branch instructions retired. Branch prediction predicts the branch target and enables the … 43 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired", 48 …t CALL branch instructions retired. Branch prediction predicts the branch target and enables the … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/ |
H A D | floating-point.json | 3 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 12 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 30 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 39 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 48 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 57 …instructions retired; some instructions will count twice as noted below. Each count represents 1 c… 66 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 75 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 84 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/ |
H A D | floating-point.json | 3 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 12 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 30 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 39 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 48 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 57 …instructions retired; some instructions will count twice as noted below. Each count represents 1 c… 66 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 75 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 84 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.td | 88 "Enable VFP2 instructions with " 93 "Enable VFP2 instructions", 96 defm FeatureVFP3: VFPver<"vfp3", "HasVFPv3", "Enable VFP3 instructions", 100 "Enable NEON instructions", 108 defm FeatureVFP4: VFPver<"vfp4", "HasVFPv4", "Enable VFP4 instructions", 123 "floating point fml instructions", 129 "Enable divide instructions in Thumb">; 134 "Enable divide instructions in ARM mode">; 138 // True if the subtarget supports DMB / DSB data barrier instructions. 140 "Has data barrier (dmb/dsb) instructions">; [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/ |
H A D | floating-point.json | 93 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 104 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 115 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 126 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 137 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 148 …instructions retired; some instructions will count twice as noted below. Each count represents 1 …
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVScheduleV.td | 13 // Used for widening and narrowing instructions as it doesn't contain M8. 32 // For floating-point instructions, SEW won't be 8. 34 // For widening instructions, SEW will not be 64. 283 // 6. Configuration-Setting Instructions 289 // 7.4. Vector Unit-Stride Instructions 295 // 7.5. Vector Strided Instructions 304 // 7.6. Vector Indexed Instructions 323 // 7.8. Vector Segment Instructions 337 // 7.9. Vector Whole Register Instructions 347 // 11. Vector Integer Arithmetic Instructions [all …]
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/freebsd/lib/libpmc/ |
H A D | pmc.core.3 | 193 The number of branch instructions executed that were mispredicted at 202 instructions executed. 207 instructions executed that were mispredicted. 210 The number of conditional branch instructions executed. 213 The number of conditional branch instructions executed that were mispredicted. 218 instructions executed. 224 The number of indirect branch instructions executed that were mispredicted. 227 The number of branch instructions executed including speculative branches. 230 The number of branch instructions decoded. 234 The number of branch instructions retired. [all …]
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H A D | pmc.atom.3 | 231 instructions. 234 The number of branch instructions that were mispredicted when 240 instructions that were executed. 245 instructions executed. 256 instructions executed. 259 The number of indirect branch instructions executed. 262 The number of mispredicted indirect branch instructions executed. 265 The number of branch instructions decoded. 272 The number of branch instructions retired. 276 The number of branch instructions retired that were mispredicted. [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMFixupKinds.h | 24 // LDRD/LDRH/LDRB/etc. instructions. All bits are encoded. 26 // 10-bit PC relative relocation for symbol addresses used in VFP instructions 31 // of Thumb2 instructions. Also used by LDRD in Thumb mode. 33 // 9-bit PC relative relocation for symbol addresses used in VFP instructions 37 // of Thumb2 instructions. 48 // 24-bit PC relative relocation for conditional branch instructions. 50 // 24-bit PC relative relocation for branch instructions. (unconditional) 53 // instructions. 56 // instructions. 59 // 12-bit fixup for Thumb B instructions [all...] |
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/ |
H A D | floating-point.json | 3 …instructions retired. Each count represents 2 computations. Applies to SSE* and AVX* packed doubl… 12 …instructions retired. Each count represents 4 computations. Applies to SSE* and AVX* packed singl… 21 …instructions retired. Each count represents 4 computations. Applies to SSE* and AVX* packed doubl… 30 …instructions retired. Each count represents 8 computations. Applies to SSE* and AVX* packed singl… 39 …instructions retired. Applies to SSE* and AVX*scalar, double and single precision floating-point: … 48 …instructions retired. Applies to SSE* and AVX*, packed, double and single precision floating-point… 57 …instructions retired. Applies to SSE* and AVX* scalar, double and single precision floating-point:… 66 …instructions retired. Each count represents 1 computation. Applies to SSE* and AVX* scalar double… 75 …instructions retired. Each count represents 1 computation. Applies to SSE* and AVX* scalar single… 84 …instructions retired. Applies to SSE* and AVX*scalar, double and single precision floating-point: … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/goldmont/ |
H A D | pipeline.json | 3 "BriefDescription": "Retired branch instructions (Precise event capable)", 9 …"PublicDescription": "Counts branch instructions retired for all branch types. This is an archite… 13 "BriefDescription": "Retired taken branch instructions (Precise event capable)", 19 "PublicDescription": "Counts the number of taken branch instructions retired.", 24 "BriefDescription": "Retired near call instructions (Precise event capable)", 30 "PublicDescription": "Counts near CALL branch instructions retired.", 35 "BriefDescription": "Retired far branch instructions (Precise event capable)", 41 …"PublicDescription": "Counts far branch instructions retired. This includes far jump, far call an… 46 "BriefDescription": "Retired near indirect call instructions (Precise event capable)", 52 "PublicDescription": "Counts near indirect CALL branch instructions retired.", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/knightslanding/ |
H A D | pipeline.json | 3 "BriefDescription": "Counts the number of branch instructions retired", 11 "BriefDescription": "Counts the number of near CALL branch instructions retired.", 20 "BriefDescription": "Counts the number of far branch instructions retired.", 29 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.", 38 …"BriefDescription": "Counts the number of branch instructions retired that were conditional jumps.… 47 …"BriefDescription": "Counts the number of branch instructions retired that were near indirect CALL… 56 "BriefDescription": "Counts the number of near relative CALL branch instructions retired.", 65 "BriefDescription": "Counts the number of near RET branch instructions retired.", 74 …"BriefDescription": "Counts the number of branch instructions retired that were conditional jumps … 83 "BriefDescription": "Counts the number of mispredicted branch instructions retired", [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/ |
H A D | Scheduler.h | 41 /// This method ranks instructions based on their age, and the number of known 55 /// Prioritize older instructions over younger instructions to minimize the in compare() 63 /// Class Scheduler is responsible for issuing instructions to pipeline 68 /// instructions from the dispatch stage, until the write-back stage. 79 // Instructions dispatched to the Scheduler are internally classified based on 84 // unknown. By construction, the WaitSet only contains instructions that are 89 // known. Instructions in the PendingSet can only be in the IS_PENDING or 90 // IS_READY stage. Only IS_READY instructions that are waiting on memory 93 // Instructions i [all...] |
/freebsd/lib/libpmc/pmu-events/arch/x86/goldmontplus/ |
H A D | pipeline.json | 3 "BriefDescription": "Retired branch instructions (Precise event capable)", 10 …"PublicDescription": "Counts branch instructions retired for all branch types. This is an archite… 14 "BriefDescription": "Retired taken branch instructions (Precise event capable)", 21 "PublicDescription": "Counts the number of taken branch instructions retired.", 26 "BriefDescription": "Retired near call instructions (Precise event capable)", 33 "PublicDescription": "Counts near CALL branch instructions retired.", 38 "BriefDescription": "Retired far branch instructions (Precise event capable)", 45 …"PublicDescription": "Counts far branch instructions retired. This includes far jump, far call an… 50 "BriefDescription": "Retired near indirect call instructions (Precise event capable)", 57 "PublicDescription": "Counts near indirect CALL branch instructions retired.", [all …]
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