Lines Matching full:instructions

24   // LDRD/LDRH/LDRB/etc. instructions. All bits are encoded.
26   // 10-bit PC relative relocation for symbol addresses used in VFP instructions
31   // of Thumb2 instructions. Also used by LDRD in Thumb mode.
33   // 9-bit PC relative relocation for symbol addresses used in VFP instructions
37   // of Thumb2 instructions.
48   // 24-bit PC relative relocation for conditional branch instructions.
50   // 24-bit PC relative relocation for branch instructions. (unconditional)
53   // instructions.
56   // instructions.
59   // 12-bit fixup for Thumb B instructions.
62   // The following fixups handle the ARM BL instructions. These can be
71   // Fixup for unconditional ARM BL instructions.
74   // Fixup for ARM BL instructions with nontrivial conditionalisation.
77   // Fixup for ARM BLX instructions.
80   // Fixup for Thumb BL instructions.
83   // Fixup for Thumb BLX instructions.
86   // Fixup for Thumb branch instructions.
92   // Fixup for Thumb conditional branching instructions.