| /linux/Documentation/core-api/ |
| H A D | circular-buffers.rst | 9 Linux provides a number of features that can be used to implement circular
10 buffering. There are two sets of such features:
12 (1) Convenience functions for determining information about power-of-2 sized
15 (2) Memory barriers for when the producer and the consumer of objects in the
27 (*) Measuring power-of-2 buffers.
30 - The producer.
31 - The consumer.
38 First of all, what is a circular buffer? A circular buffer is a buffer of
39 fixed, finite size into which there are two indices:
41 (1) A 'head' index - the point at which the producer inserts items into the
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| /linux/Documentation/devicetree/bindings/clock/ti/ |
| H A D | ti,divider-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/ti/ti,divider-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <kristo@kernel.org>
13 This clock It assumes a register-mapped adjustable clock rate divider
25 ti,index-starts-at-one - valid divisor values start at 1, not the default
26 of 0. E.g:
32 ti,index-power-of-two - valid divisor values are powers of two. E.g:
38 Additionally an array of valid dividers may be supplied like so:
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | fsl,imx8qm-lvds-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-lvds-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 It converts two groups of four 7/10 bits of CMOS data into two
15 groups of four data lanes of LVDS data streams. A phase-locked
16 transmit clock is transmitted in parallel with each group of
17 data streams over a fifth LVDS link. Every cycle of the transmit
18 clock, 56/80 bits of input data are sampled and transmitted
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | power_domain.txt | 4 used for power gating of selected IP blocks for power saving by reduced leakage
10 domains. A consumer node can refer to the provider by a phandle and a set of
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
22 the power controller that is the PM domain provider.
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | renesas,rzv2h-cpg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,rzv2h-cpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 and control of clock signals for the IP modules, generation and control of resets,
15 and control over booting, low power consumption and power supply domains.
19 const: renesas,r9a09g057-cpg
26 - description: AUDIO_EXTAL clock input
27 - description: RTXIN clock input
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| /linux/drivers/sbus/char/ |
| H A D | bbc_envctrl.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* bbc_envctrl.c: UltraSPARC-III environment control driver.
11 #include <linux/of.h>
23 * cut the power on you instantly.
26 /* Two temperature sensors exist in the SunBLADE-1000 enclosure.
28 * monitors 2 temperatures, one for one of the cpu dies and the other
31 * The max1617 is capable of being programmed with power-off
34 * If a limit is violated, the power is simply shut off. The frequency
40 * two processor slots, another for the rest of the enclosure, and the
41 * third is for the power supply. The first two fans may be speed
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| /linux/drivers/staging/rtl8723bs/hal/ |
| H A D | HalPhyRf.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
19 /* delta of temperature between two TxPowerTracking watch dogs. */
21 /* NOTE: If Tx BB swing or Tx scaling is varified during run-time, still */
26 struct hal_com_data *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); in ODM_ClearTxPowerTrackingState()
29 pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex; in ODM_ClearTxPowerTrackingState()
30 pDM_Odm->BbSwingIdxCck = pDM_Odm->DefaultCckIndex; in ODM_ClearTxPowerTrackingState()
31 pDM_Odm->RFCalibrateInfo.CCK_index = 0; in ODM_ClearTxPowerTrackingState()
34 pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex; in ODM_ClearTxPowerTrackingState()
35 pDM_Odm->BbSwingIdxOfdm[p] = pDM_Odm->DefaultOfdmIndex; in ODM_ClearTxPowerTrackingState()
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| /linux/drivers/video/backlight/ |
| H A D | ili9320.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 struct ili9320_spi *spi = &ili->access.spi; in ili9320_write_spi()
30 unsigned char *addr = spi->buffer_addr; in ili9320_write_spi()
31 unsigned char *data = spi->buffer_data; in ili9320_write_spi()
33 /* spi message consits of: in ili9320_write_spi()
37 addr[0] = spi->id | ILI9320_SPI_INDEX | ILI9320_SPI_WRITE; in ili9320_write_spi()
43 data[0] = spi->id | ILI9320_SPI_DATA | ILI9320_SPI_WRITE; in ili9320_write_spi()
47 return spi_sync(spi->dev, &spi->message); in ili9320_write_spi()
52 dev_dbg(ili->dev, "write: reg=%02x, val=%04x\n", reg, value); in ili9320_write()
53 return ili->write(ili, reg, value); in ili9320_write()
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| /linux/tools/perf/util/bpf_skel/ |
| H A D | augmented_raw_syscalls.bpf.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Augment the raw_syscalls tracepoints with the contents of the pointer arguments.
15 #define PERF_ALIGN(x, a) __PERF_ALIGN_MASK(x, (typeof(x))(a)-1)
19 * is_power_of_2() - check if a value is a power of two
22 * Determine whether some value is a power of two, where zero is *not*
23 * considered a power of two. Return: true if @n is a power of 2, otherwise
26 #define is_power_of_2(n) (n != 0 && ((n & (n - 1)) == 0))
30 /* bpf-output associated map */
75 * Desired design of maximum size and alignment (see RFC2553)
92 char __data[SS_MAXSIZE - sizeof(unsigned short)];
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| /linux/Documentation/hid/ |
| H A D | hiddev.rst | 2 Care and feeding of your Human Interface Devices
10 interfaces, but have similar sorts of communication needs. The two big
11 examples for this are power devices (especially uninterruptible power
15 HID events to two separate interfaces:
18 normalised event interface - see Documentation/input/input.rst
24 usb.c ---> hid-core.c ----> hid-input.c ----> [keyboard/mouse/joystick/event]
27 --> hiddev.c ----> POWER / MONITOR CONTROL
57 So you point your hiddev compliant user-space program at the correct
60 Assuming that you have a hiddev compliant user-space program, of
69 conveniently linked of http://www.linux-usb.org.
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | fsl,imx8qxp-ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
20 format and can map the input to VESA or JEIDA standards. The two channels
21 cannot be used simultaneously, that is to say, the user should pick one of
22 them to use. Two LDB channels from two LDB instances can work together in
28 input color format. The two channels can be used simultaneously, either
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| H A D | fsl,imx8qxp-pixel-combiner.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
14 single display controller and manipulates the two streams to support a number
15 of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
16 either one screen, two screens, or virtual screens. The pixel combiner is
17 also responsible for generating some of the control signals for the pixel link
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| /linux/drivers/net/ethernet/amd/pds_core/ |
| H A D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 #define PDSC_ADMINQ_MIN_LENGTH 16 /* must be a power of two */
20 #define PDSC_NOTIFYQ_LENGTH 64 /* must be a power of two */
38 u16 index; member
55 unsigned int index; member
75 unsigned int index; member
179 struct pdsc_intr_info *intr_info; /* array of nintrs elements */
203 /** enum pds_core_dbell_bits - bitwise composition of dbell values.
205 * @PDS_CORE_DBELL_QID_MASK: unshifted mask of valid queue id bits.
207 * @PDS_CORE_DBELL_QID: macro to build QID component of dbell value.
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| /linux/Documentation/admin-guide/pm/ |
| H A D | intel_idle.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 ``intel_idle`` is a part of the
19 Nehalem and later generations of Intel processors, but the level of support for
24 Documentation/admin-guide/pm/cpuidle.rst if you have not done that yet.]
27 logical CPU executing it is idle and so it may be possible to put some of the
28 processor's functional blocks into low-power states. That instruction takes two
29 arguments (passed in the ``EAX`` and ``ECX`` registers of the target CPU), the
30 first of which, referred to as a *hint*, can be used by the processor to
38 only way to pass early-configuration-time parameters to it is via the kernel
42 .. _intel-idle-enumeration-of-states:
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | maxim,max9286.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data
23 not addressed to itself to the other side of the links, where a GMSL
28 '#address-cells':
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| /linux/arch/arm/mach-omap2/ |
| H A D | board-n8x0.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-omap2/board-n8x0.c
5 * Copyright (C) 2005-2009 Nokia Corporation
8 * Modified from mach-omap2/board-generic.c
23 #include <linux/platform_data/spi-omap2-mcspi.h>
24 #include <linux/platform_data/mmc-omap.h>
28 #include <asm/mach-types.h>
32 #include "usb-tusb6010.h"
34 #include "common-board-devices.h"
56 else if (of_machine_is_compatible("nokia,n810-wimax")) in board_check_revision()
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| /linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | sci-pm-domain.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI generic power domain
10 - Nishanth Menon <nm@ti.com>
13 - $ref: /schemas/power/power-domain.yaml#
16 Some TI SoCs contain a system controller (like the Power Management Micro
18 the state of the various hardware modules present on the SoC. Communication
20 through a protocol called TI System Control Interface (TI-SCI protocol).
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| /linux/Documentation/devicetree/bindings/soc/dove/ |
| H A D | pmu.txt | 4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
17 standard property of this name. Required when compatible includes
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| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
14 this M4U have two generations of HW architecture. Generation one uses flat
15 pagetable, and only supports 4K size page mapping. Generation two uses the
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
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| /linux/include/linux/ssb/ |
| H A D | ssb_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
17 #define SSB_FLASH2_SZ 0x02000000U /* Size of Flash Region 2 */
21 #define SSB_FLASH1_SZ 0x00400000U /* Size of Flash Region 1 */
32 #define SSB_CORE_SIZE 0x1000 /* Size of a core MMIO area */
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
105 #define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
167 * two bytes wide. Note that the SPROM can _only_ be read
168 * in two-byte quantities.
202 #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */
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| /linux/include/xen/interface/io/ |
| H A D | ring.h | 1 /* SPDX-License-Identifier: MIT */
5 * Shared producer-consumer ring macros.
16 * - standard integers types (uint8_t, uint16_t, etc)
17 * They are provided by stdint.h of the standard headers.
21 * - size_t
22 * - memcpy
23 * - grant_ref_t
24 * These declarations are provided by string.h of the standard headers,
32 /* Round a 32-bit unsigned constant down to the nearest power of two. */
40 * Calculate size of a shared ring, given the total available space for the
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| /linux/Documentation/w1/slaves/ |
| H A D | w1_therm.rst | 16 -----------
32 read sequence will initiate a temperature conversion, then provide two
33 lines of ASCII output. The first line contains the nine hex bytes
42 A bulk read of all devices on the bus could be done writing ``trigger``
49 -1 if at least one sensor still in conversion, 1 if conversion is complete
51 then accessed by reading the ``temperature`` entry of each device, which
55 time of issue of the bulk read command (not the current temperature).
67 completion. Options 2, 3 can't be used in parasite power mode. To get back to
71 precision of the sensor for the next readings. Allowed resolutions are defined by
72 the sensor. Resolution is reset when the sensor gets power-cycled.
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| /linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | tx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_tx_flags - bitmasks for tx_flags in TX command
12 * @TX_CMD_FLG_PROT_REQUIRE: use RTS or CTS-to-self to protect the frame
13 * @TX_CMD_FLG_WRITE_TX_POWER: update current tx power value in the mgmt frame
15 * @TX_CMD_FLG_STA_RATE: use RS table with initial index from the TX command.
24 * @TX_CMD_FLG_BT_PRIO_POS: the position of the BT priority (bit 11 is ignored
28 * Should be set for mgmt, non-QOS data, mcast, bcast and in scan command
29 * @TX_CMD_FLG_MORE_FRAG: this frame is non-last MPDU
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| /linux/include/linux/ |
| H A D | remoteproc.h | 12 * * Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * notice, this list of conditions and the following disclaimer in
18 * * Neither the name Texas Instruments nor the names of its
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 #include <linux/of.h>
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| /linux/drivers/memory/ |
| H A D | emif.c | 1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/of.h>
33 * struct emif_data - Per device static data for driver's use
37 * @temperature_level: Maximum temperature of LPDDR2 devices attached
38 * to this EMIF - read from MR4 register. If there
39 * are two devices attached to this EMIF, this
40 * value is the maximum of the two temperature
43 * @base: base address of memory-mapped IO registers.
45 * @regs_cache: An array of 'struct emif_regs' that stores
47 * frequencies, to avoid re-calculating them on
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