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/freebsd/sys/contrib/device-tree/Bindings/clock/ti/
H A Dti,divider-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/ti/ti,divider-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <kristo@kernel.org>
13 This clock It assumes a register-mapped adjustable clock rate divider
25 ti,index-starts-at-one - valid divisor values start at 1, not the default
26 of 0. E.g:
32 ti,index-power-of-two - valid divisor values are powers of two. E.g:
38 Additionally an array of valid dividers may be supplied like so:
[all …]
H A Ddivider.txt4 register-mapped adjustable clock rate divider that does not gate and has
15 ti,index-starts-at-one - valid divisor values start at 1, not the default
16 of 0. E.g:
22 ti,index-power-of-two - valid divisor values are powers of two. E.g:
28 Additionally an array of valid dividers may be supplied like so:
32 Which will map the resulting values to a divisor table by their index:
39 Any zero value in this array means the corresponding bit-value is invalid
44 the number of bits to shift that mask, if necessary. If the shift value
50 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
54 - compatible : shall be "ti,divider-clock" or "ti,composite-divider-clock".
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dfsl,imx8qm-lvds-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-lvds-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 It converts two groups of four 7/10 bits of CMOS data into two
15 groups of four data lanes of LVDS data streams. A phase-locked
16 transmit clock is transmitted in parallel with each group of
17 data streams over a fifth LVDS link. Every cycle of the transmit
18 clock, 56/80 bits of input data are sampled and transmitted
[all …]
/freebsd/sys/contrib/device-tree/Bindings/power/
H A Dpower_domain.txt4 used for power gating of selected IP blocks for power saving by reduced leakage
10 domains. A consumer node can refer to the provider by a phandle and a set of
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
22 the power controller that is the PM domain provider.
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
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H A Drenesas,sysc-rmobile.txt1 DT bindings for the Renesas R-Mobile System Controller
5 The R-Mobile System Controller provides the following functions:
6 - Boot mode management,
7 - Reset generation,
8 - Power management.
11 - compatible: Should be "renesas,sysc-<soctype>", "renesas,sysc-rmobile" as
14 - "renesas,sysc-r8a73a4" (R-Mobile APE6)
15 - "renesas,sysc-r8a7740" (R-Mobile A1)
16 - "renesas,sysc-sh73a0" (SH-Mobile AG5)
17 - reg: Two address start and address range blocks for the device:
[all …]
/freebsd/secure/lib/libcrypto/man/man3/
H A DBN_mod_exp_mont.31 .\" -*- mode: troff; coding: utf-8 -*-
33 .\" If the F register is >0, we'll generate index entries on stderr for
34 .\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
35 .\" entries marked with X<> in POD. Of course, you'll have to process the
46 . tm Index:\\$1\t\\n%\t"\\$2"
58 .TH BN_MOD_EXP_MONT 3ossl 2025-09-30 3.5.4 OpenSSL
64 BN_mod_exp_mont, BN_mod_exp_mont_consttime, BN_mod_exp_mont_consttime_x2 \-
87 \&\fBBN_mod_exp_mont()\fR computes \fIa\fR to the \fIp\fR\-th power modulo \fIm\fR (\f(CW\*(C`rr=a^…
92 \&\fBBN_mod_exp_mont_consttime()\fR computes \fIa\fR to the \fIp\fR\-th power modulo \fIm\fR
93 (\f(CW\*(C`rr=a^p % m\*(C'\fR) using Montgomery multiplication. It is a variant of
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/freebsd/share/man/man9/
H A Dpci.98 .\" 1. Redistributions of source code must retain the above copyright
9 .\" notice, this list of conditions and the following disclaimer.
11 .\" notice, this list of conditions and the following disclaimer in the
16 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
142 .Fn pci_pending_msix "device_t dev" "u_int index"
197 set of functions are used for managing PCI devices.
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/freebsd/lib/libutil/
H A Dhumanize_number.312 .\" 1. Redistributions of source code must retain the above copyright
13 .\" notice, this list of conditions and the following disclaimer.
15 .\" notice, this list of conditions and the following disclaimer in the
20 .\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 .\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 .\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 .\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 .\" POSSIBILITY OF SUCH DAMAGE.
48 function formats the signed 64-bit quantity given in
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Drenesas,rzv2h-cpg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,rzv2h-cpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 generation and control of clock signals for the IP modules, generation and
15 control of resets, and control over booting, low power consumption and power
21 - renesas,r9a09g047-cpg # RZ/G3E
22 - renesas,r9a09g056-cpg # RZ/V2N
23 - renesas,r9a09g057-cpg # RZ/V2H
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h1 //===- llvm/CodeGen/GlobalISel/LegalizerInfo.h ------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
50 /// a narrower scalar base-type. For example a 64-bit add might be
51 /// implemented in terms of 32-bit add-with-carry.
54 /// The operation should be implemented in terms of a wider scalar
55 /// base-type. For example a <2 x s8> add could be implemented as a <2
60 /// sub-vectors where the operation is legal. For example a <8 x s64> add
[all …]
/freebsd/sys/dev/ixl/
H A Dixl_pf_qmgr.c3 Copyright (c) 2013-2018, Intel Corporation
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
13 notice, this list of conditions and the following disclaimer in the
16 3. Neither the name of the Intel Corporation nor the names of its
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
[all …]
/freebsd/contrib/jemalloc/include/jemalloc/internal/
H A Dsc.h10 * generally work, and then describe some of the details.
14 * such that they cover allocation request sizes in a power-of-2 range. The
15 * power of two is called the base of the group, and the size classes in it
16 * satisfy allocations in the half-ope
270 int index; global() member
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra7xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 atl_clkin0_ck: clock-atl-clkin0 {
9 #clock-cells = <0>;
10 compatible = "ti,dra7-atl-clock";
11 clock-output-names = "atl_clkin0_ck";
15 atl_clkin1_ck: clock-atl-clkin1 {
16 #clock-cells = <0>;
17 compatible = "ti,dra7-atl-clock";
18 clock-output-names = "atl_clkin1_ck";
22 atl_clkin2_ck: clock-atl-clkin2 {
[all …]
/freebsd/sys/netpfil/ipfw/
H A Ddn_heap.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1998-2002,2010 Luigi Rizzo, Universita` di Pisa
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
13 * notice, this list of conditions and the following disclaimer in the
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
[all …]
/freebsd/sys/compat/linuxkpi/common/src/
H A Dlinux_xarray.c1 /*-
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
12 * notice, this list of conditions and the following disclaimer in the
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 * return NULL for both an unused index and an index set to NULL. But it
[all …]
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DSwiftCallingConv.cpp1 //===--- SwiftCallingConv.cpp - Lowering for the Swift calling convention -===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // Implementation of the abstract lowering for the Swift calling convention.
11 //===----------------------------------------------------------------------===//
29 return n == (n & -n); in isPowerOf2()
32 /// Given two types with the same size, try to find a common type.
37 if (first->isIntegerTy()) { in getCommonType()
38 if (second->isPointerTy()) return first; in getCommonType()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
20 format and can map the input to VESA or JEIDA standards. The two channels
21 cannot be used simultaneously, that is to say, the user should pick one of
22 them to use. Two LDB channels from two LDB instances can work together in
28 input color format. The two channels can be used simultaneously, either
[all …]
H A Dfsl,imx8qxp-pixel-combiner.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
14 single display controller and manipulates the two streams to support a number
15 of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
16 either one screen, two screens, or virtual screens. The pixel combiner is
17 also responsible for generating some of the control signals for the pixel link
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A Dbit.h1 //===-- llvm/ADT/bit.h - C++20 <bit> -------
[all...]
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dmaxim,max9286.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data
23 not addressed to itself to the other side of the links, where a GMSL
28 '#address-cells':
[all …]
/freebsd/sys/contrib/dpdk_rte_lpm/
H A Drte_common.h1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2019 Intel Corporation
11 * Generic, commonly-used macro and inline function definitions
107 * Check format string and its arguments at compile-time.
109 * GCC on Windows assumes MS-specific format string by default,
110 * even if the underlying stdio implementation is ANSI-compliant,
207 * add a byte-value offset to a pointer
212 * subtract a byte-value offset from a pointer
214 #define RTE_PTR_SUB(ptr, x) ((void*)((uintptr_t)ptr - (x)))
217 * get the difference between two pointer values, i.e. how far apart
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/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dsci-pm-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI generic power domain
10 - Nishanth Menon <nm@ti.com>
13 - $ref: /schemas/power/power-domain.yaml#
16 Some TI SoCs contain a system controller (like the Power Management Micro
18 the state of the various hardware modules present on the SoC. Communication
20 through a protocol called TI System Control Interface (TI-SCI protocol).
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/dove/
H A Dpmu.txt4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
17 standard property of this name. Required when compatible includes
[all …]
/freebsd/usr.sbin/bhyve/
H A Dvirtio.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
13 * notice, this list of conditions and the following disclaimer in the
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUT
[all...]
/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dtx.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_tx_flags - bitmasks for tx_flags in TX command
12 * @TX_CMD_FLG_PROT_REQUIRE: use RTS or CTS-to-self to protect the frame
13 * @TX_CMD_FLG_WRITE_TX_POWER: update current tx power value in the mgmt frame
15 * @TX_CMD_FLG_STA_RATE: use RS table with initial index from the TX command.
24 * @TX_CMD_FLG_BT_PRIO_POS: the position of the BT priority (bit 11 is ignored
28 * Should be set for mgmt, non-QOS data, mcast, bcast and in scan command
29 * @TX_CMD_FLG_MORE_FRAG: this frame is non-last MPDU
[all …]

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