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Searched +full:hsic +full:- +full:state (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/phy/marvell/
H A Dphy-pxa-28nm-hsic.c1 // SPDX-License-Identifier: GPL-2.0-only
59 struct platform_device *pdev = mv_phy->pdev; in mv_hsic_phy_init()
60 void __iomem *base = mv_phy->base; in mv_hsic_phy_init()
63 clk_prepare_enable(mv_phy->clk); in mv_hsic_phy_init()
80 dev_err(&pdev->dev, "HSIC PHY PLL not locked after 100mS."); in mv_hsic_phy_init()
81 clk_disable_unprepare(mv_phy->clk); in mv_hsic_phy_init()
90 struct platform_device *pdev = mv_phy->pdev; in mv_hsic_phy_power_on()
91 void __iomem *base = mv_phy->base; in mv_hsic_phy_power_on()
96 /* Avoid SE0 state when resume for some device will take it as reset */ in mv_hsic_phy_power_on()
98 reg |= PHY_28NM_HSIC_S2H_HSIC_EN; /* Enable HSIC PHY */ in mv_hsic_phy_power_on()
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/linux/drivers/phy/tegra/
H A Dxusb-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
27 ((x) ? (11 + ((x) - 1) * 6) : 0)
451 for (map = tegra210_usb3_map; map->type; map++) { in tegra210_usb3_lane_map()
452 if (map->index == lane->index && in tegra210_usb3_lane_map()
453 strcmp(map->type, lane->pad->soc->name) == 0) { in tegra210_usb3_lane_map()
454 dev_dbg(lane->pad->padctl->dev, "lane = %s map to port = usb3-%d\n", in tegra210_usb3_lane_map()
455 lane->pad->soc->lanes[lane->index].name, map->port); in tegra210_usb3_lane_map()
456 return map->port; in tegra210_usb3_lane_map()
460 return -EINVAL; in tegra210_usb3_lane_map()
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H A Dxusb-tegra186.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
280 writel(value, priv->ao_regs + offset); in ao_writel()
285 return readl(priv->ao_regs + offset); in ao_readl()
304 return ERR_PTR(-ENOMEM); in tegra186_usb2_lane_probe()
306 INIT_LIST_HEAD(&usb2->base.list); in tegra186_usb2_lane_probe()
307 usb2->base.soc = &pad->soc->lanes[index]; in tegra186_usb2_lane_probe()
308 usb2->base.index = index; in tegra186_usb2_lane_probe()
309 usb2->base.pad = pad; in tegra186_usb2_lane_probe()
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-usb-hsic.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/pinctrl/pinctrl-state.h>
29 struct ulpi *ulpi = uphy->ulpi; in qcom_usb_hsic_phy_power_on()
33 ret = clk_prepare_enable(uphy->phy_clk); in qcom_usb_hsic_phy_power_on()
37 ret = clk_prepare_enable(uphy->cal_clk); in qcom_usb_hsic_phy_power_on()
41 ret = clk_prepare_enable(uphy->cal_sleep_clk); in qcom_usb_hsic_phy_power_on()
55 /* Configure pins for HSIC functionality */ in qcom_usb_hsic_phy_power_on()
56 pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT); in qcom_usb_hsic_phy_power_on()
62 ret = pinctrl_select_state(uphy->pctl, pins_default); in qcom_usb_hsic_phy_power_on()
66 /* Enable HSIC mode in HSIC_CFG register */ in qcom_usb_hsic_phy_power_on()
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,msm8974-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,msm8974-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
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H A Dqcom,msm8960-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8960-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,msm8960-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
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/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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/linux/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Copyright (C) 2013-2014 Silicon Image, Inc.
137 /* Interrupt State, default value: 0x00 */
323 /* I2C Device Address re-assignment */
338 /* HSIC RX Control3, default value: 0x07 */
345 /* HSIC RX INT Registers */
417 /* HSIC TX CRTL, default value: 0x00 */
425 /* HSIC TX INT Low, default value: 0x00 */
428 /* HSIC TX INT High, default value: 0x00 */
431 /* HSIC Keeper, default value: 0x00 */
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H A Dsil-sii8620.c1 // SPDX-License-Identifier: GPL-2.0-only
32 #include <media/rc-core.h>
34 #include "sil-sii8620.h"
122 0x3d, /* TDM and HSIC */
124 0x4d, /* eMSC, HDCP, HSIC */
128 0x61, /* eCBUS-S, eCBUS-D */
139 int ret = ctx->error; in sii8620_clear_error()
141 ctx->error = 0; in sii8620_clear_error()
147 struct device *dev = ctx->dev; in sii8620_read_buf()
153 .flags = client->flags, in sii8620_read_buf()
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/linux/drivers/usb/misc/
H A Dusb4604.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for SMSC USB4604 USB HSIC 4-port 2.0 hub controller driver
6 * Copyright (c) 2012-2013 Dongjin Kim (tobetter@gmail.com)
28 static void usb4604_reset(struct usb4604 *hub, int state) in usb4604_reset() argument
30 gpiod_set_value_cansleep(hub->gpio_reset, state); in usb4604_reset()
33 if (state) in usb4604_reset()
39 struct device *dev = hub->dev; in usb4604_connect()
52 hub->mode = USB4604_MODE_HUB; in usb4604_connect()
60 struct device *dev = hub->dev; in usb4604_switch_mode()
75 err = -EINVAL; in usb4604_switch_mode()
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-apalis-ixora-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/leds/common.h>
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_leds_ixora>;
20 led-1 {
22 default-state = "off";
28 led-2 {
30 default-state = "off";
36 led-3 {
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H A Dimx8-apalis-ixora-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/leds/common.h>
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_leds_ixora>;
20 led-1 {
22 default-state = "off";
28 led-2 {
30 default-state = "off";
36 led-3 {
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H A Dimx8-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/pwm/pwm.h>
10 stdout-path = &lpuart1;
15 compatible = "pwm-backlight";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_bkl_on>;
18 brightness-levels = <0 45 63 88 119 158 203 255>;
19 default-brightness-level = <4>;
20 enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */
21 /* TODO: hook-up to Apalis BKL1_PWM */
[all …]
/linux/drivers/usb/host/
H A Dxhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
11 #include <linux/dma-mapping.h>
236 } usb2, ulpi, hsic, usb3; member
321 return readl(tegra->fpci_base + offset); in fpci_readl()
327 writel(value, tegra->fpci_base + offset); in fpci_writel()
332 return readl(tegra->ipfs_base + offset); in ipfs_readl()
338 writel(value, tegra->ipfs_base + offset); in ipfs_writel()
343 return readl(tegra->bar2_base + offset); in bar2_readl()
349 writel(value, tegra->bar2_base + offset); in bar2_writel()
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/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d27_wlsom1_ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
9 /dts-v1/;
10 #include "at91-sama5d27_wlsom1.dtsi"
11 #include <dt-bindings/input/input.h>
15 …compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel…
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 pinctrl-names = "default";
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-cm-t54.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Support for CompuLab CM-T54
5 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 model = "CompuLab CM-T54";
13 compatible = "compulab,omap5-cm-t54", "ti,omap5";
26 vmmcsd_fixed: fixed-regulator-mmcsd {
27 compatible = "regulator-fixed";
28 regulator-name = "vmmcsd_fixed";
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/linux/drivers/phy/allwinner/
H A Dphy-sun4i-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
18 #include <linux/extcon-provider.h>
28 #include <linux/phy/phy-sun4i-usb.h>
85 /* A83T specific control bits for PHY2 HSIC */
146 container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
154 iscr = readl(data->base + REG_ISCR); in sun4i_usb_phy0_update_iscr()
157 writel(iscr, data->base + REG_ISCR); in sun4i_usb_phy0_update_iscr()
184 u32 temp, usbc_bit = BIT(phy->index * 2); in sun4i_usb_phy_write()
185 void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset; in sun4i_usb_phy_write()
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-bananapi-m64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 model = "BananaPi-M64";
13 compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
22 stdout-path = "serial0:115200n8";
25 hdmi-connector {
26 compatible = "hdmi-connector";
[all …]
H A Dsun50i-a64-pinephone.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pwm/pwm.h>
15 chassis-type = "handset";
23 compatible = "pwm-backlight";
25 enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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/linux/drivers/platform/x86/
H A Dpmc_atom.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2014-2015,2017,2022 Intel Corporation.
15 #include <linux/platform_data/x86/clk-pmc-atom.h>
17 #include <linux/platform_data/x86/simatic-ipc.h>
208 return readl(pmc->regmap + reg_offset); in pmc_reg_read()
213 writel(val, pmc->regmap + reg_offset); in pmc_reg_write()
220 if (!pmc->init) in pmc_atom_read()
221 return -ENODEV; in pmc_atom_read()
232 pr_info("Preparing to enter system sleep state S5\n"); in pmc_power_off()
248 * - LPC clock run in pmc_hw_reg_setup()
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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