xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,apq8084-pinctrl.yaml (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5) 
1*d3f891f1SRayyan Ansari# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*d3f891f1SRayyan Ansari%YAML 1.2
3*d3f891f1SRayyan Ansari---
4*d3f891f1SRayyan Ansari$id: http://devicetree.org/schemas/pinctrl/qcom,apq8084-pinctrl.yaml#
5*d3f891f1SRayyan Ansari$schema: http://devicetree.org/meta-schemas/core.yaml#
6*d3f891f1SRayyan Ansari
7*d3f891f1SRayyan Ansarititle: Qualcomm Technologies, Inc. APQ8084 TLMM block
8*d3f891f1SRayyan Ansari
9*d3f891f1SRayyan Ansarimaintainers:
10*d3f891f1SRayyan Ansari  - Bjorn Andersson <bjorn.andersson@linaro.org>
11*d3f891f1SRayyan Ansari
12*d3f891f1SRayyan Ansaridescription: |
13*d3f891f1SRayyan Ansari  Top Level Mode Multiplexer pin controller in Qualcomm APQ8084 SoC.
14*d3f891f1SRayyan Ansari
15*d3f891f1SRayyan AnsariallOf:
16*d3f891f1SRayyan Ansari  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17*d3f891f1SRayyan Ansari
18*d3f891f1SRayyan Ansariproperties:
19*d3f891f1SRayyan Ansari  compatible:
20*d3f891f1SRayyan Ansari    const: qcom,apq8084-pinctrl
21*d3f891f1SRayyan Ansari
22*d3f891f1SRayyan Ansari  reg:
23*d3f891f1SRayyan Ansari    maxItems: 1
24*d3f891f1SRayyan Ansari
25*d3f891f1SRayyan Ansari  interrupts:
26*d3f891f1SRayyan Ansari    maxItems: 1
27*d3f891f1SRayyan Ansari
28*d3f891f1SRayyan Ansari  gpio-reserved-ranges: true
29*d3f891f1SRayyan Ansari
30*d3f891f1SRayyan AnsaripatternProperties:
31*d3f891f1SRayyan Ansari  "-state$":
32*d3f891f1SRayyan Ansari    oneOf:
33*d3f891f1SRayyan Ansari      - $ref: "#/$defs/qcom-apq8084-tlmm-state"
34*d3f891f1SRayyan Ansari      - patternProperties:
35*d3f891f1SRayyan Ansari          "-pins$":
36*d3f891f1SRayyan Ansari            $ref: "#/$defs/qcom-apq8084-tlmm-state"
37*d3f891f1SRayyan Ansari        additionalProperties: false
38*d3f891f1SRayyan Ansari
39*d3f891f1SRayyan Ansari$defs:
40*d3f891f1SRayyan Ansari  qcom-apq8084-tlmm-state:
41*d3f891f1SRayyan Ansari    type: object
42*d3f891f1SRayyan Ansari    description:
43*d3f891f1SRayyan Ansari      Pinctrl node's client devices use subnodes for desired pin configuration.
44*d3f891f1SRayyan Ansari      Client device subnodes use below standard properties.
45*d3f891f1SRayyan Ansari    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
46*d3f891f1SRayyan Ansari    unevaluatedProperties: false
47*d3f891f1SRayyan Ansari
48*d3f891f1SRayyan Ansari    properties:
49*d3f891f1SRayyan Ansari      pins:
50*d3f891f1SRayyan Ansari        description:
51*d3f891f1SRayyan Ansari          List of gpio pins affected by the properties specified in this
52*d3f891f1SRayyan Ansari          subnode.
53*d3f891f1SRayyan Ansari        items:
54*d3f891f1SRayyan Ansari          oneOf:
55*d3f891f1SRayyan Ansari            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-6])$"
56*d3f891f1SRayyan Ansari            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
57*d3f891f1SRayyan Ansari                      sdc2_data ]
58*d3f891f1SRayyan Ansari        minItems: 1
59*d3f891f1SRayyan Ansari        maxItems: 36
60*d3f891f1SRayyan Ansari
61*d3f891f1SRayyan Ansari      function:
62*d3f891f1SRayyan Ansari        description:
63*d3f891f1SRayyan Ansari          Specify the alternative function to be configured for the specified
64*d3f891f1SRayyan Ansari          pins.
65*d3f891f1SRayyan Ansari        enum: [ adsp_ext, audio_ref, blsp_i2c1, blsp_i2c2, blsp_i2c3,
66*d3f891f1SRayyan Ansari                blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8,
67*d3f891f1SRayyan Ansari                blsp_i2c9, blsp_i2c10, blsp_i2c11, blsp_i2c12,
68*d3f891f1SRayyan Ansari                blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2, blsp_spi1_cs3,
69*d3f891f1SRayyan Ansari                blsp_spi2, blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2,
70*d3f891f1SRayyan Ansari                blsp_spi3_cs3, blsp_spi4, blsp_spi5, blsp_spi6,
71*d3f891f1SRayyan Ansari                blsp_spi7, blsp_spi8, blsp_spi9, blsp_spi10,
72*d3f891f1SRayyan Ansari                blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,
73*d3f891f1SRayyan Ansari                blsp_spi11, blsp_spi12, blsp_uart1, blsp_uart2,
74*d3f891f1SRayyan Ansari                blsp_uart3, blsp_uart4, blsp_uart5, blsp_uart6,
75*d3f891f1SRayyan Ansari                blsp_uart7, blsp_uart8, blsp_uart9, blsp_uart10,
76*d3f891f1SRayyan Ansari                blsp_uart11, blsp_uart12, blsp_uim1, blsp_uim2,
77*d3f891f1SRayyan Ansari                blsp_uim3, blsp_uim4, blsp_uim5, blsp_uim6, blsp_uim7,
78*d3f891f1SRayyan Ansari                blsp_uim8, blsp_uim9, blsp_uim10, blsp_uim11,
79*d3f891f1SRayyan Ansari                blsp_uim12, cam_mclk0, cam_mclk1, cam_mclk2, cam_mclk3,
80*d3f891f1SRayyan Ansari                cci_async, cci_async_in0, cci_i2c0, cci_i2c1,
81*d3f891f1SRayyan Ansari                cci_timer0, cci_timer1, cci_timer2, cci_timer3,
82*d3f891f1SRayyan Ansari                cci_timer4, edp_hpd, gcc_gp1, gcc_gp2, gcc_gp3,
83*d3f891f1SRayyan Ansari                gcc_obt, gcc_vtt, gp_mn, gp_pdm0, gp_pdm1, gp_pdm2,
84*d3f891f1SRayyan Ansari                gp0_clk, gp1_clk, gpio, hdmi_cec, hdmi_ddc, hdmi_dtest,
85*d3f891f1SRayyan Ansari                hdmi_hpd, hdmi_rcv, hsic, ldo_en, ldo_update,
86*d3f891f1SRayyan Ansari                mdp_vsync, pci_e0, pci_e0_n, pci_e0_rst, pci_e1,
87*d3f891f1SRayyan Ansari                pci_e1_rst, pci_e1_rst_n, pci_e1_clkreq_n, pri_mi2s,
88*d3f891f1SRayyan Ansari                qua_mi2s, sata_act, sata_devsleep, sata_devsleep_n,
89*d3f891f1SRayyan Ansari                sd_write, sdc_emmc_mode, sdc3, sdc4, sec_mi2s, slimbus,
90*d3f891f1SRayyan Ansari                spdif_tx, spkr_i2s, spkr_i2s_ws, spss_geni, ter_mi2s,
91*d3f891f1SRayyan Ansari                tsif1, tsif2, uim, uim_batt_alarm ]
92*d3f891f1SRayyan Ansari
93*d3f891f1SRayyan Ansari    required:
94*d3f891f1SRayyan Ansari      - pins
95*d3f891f1SRayyan Ansari
96*d3f891f1SRayyan Ansarirequired:
97*d3f891f1SRayyan Ansari  - compatible
98*d3f891f1SRayyan Ansari  - reg
99*d3f891f1SRayyan Ansari
100*d3f891f1SRayyan AnsariunevaluatedProperties: false
101*d3f891f1SRayyan Ansari
102*d3f891f1SRayyan Ansariexamples:
103*d3f891f1SRayyan Ansari  - |
104*d3f891f1SRayyan Ansari    #include <dt-bindings/interrupt-controller/arm-gic.h>
105*d3f891f1SRayyan Ansari    tlmm: pinctrl@fd510000 {
106*d3f891f1SRayyan Ansari        compatible = "qcom,apq8084-pinctrl";
107*d3f891f1SRayyan Ansari        reg = <0xfd510000 0x4000>;
108*d3f891f1SRayyan Ansari
109*d3f891f1SRayyan Ansari        gpio-controller;
110*d3f891f1SRayyan Ansari        #gpio-cells = <2>;
111*d3f891f1SRayyan Ansari        gpio-ranges = <&tlmm 0 0 147>;
112*d3f891f1SRayyan Ansari        interrupt-controller;
113*d3f891f1SRayyan Ansari        #interrupt-cells = <2>;
114*d3f891f1SRayyan Ansari        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
115*d3f891f1SRayyan Ansari
116*d3f891f1SRayyan Ansari        uart-state {
117*d3f891f1SRayyan Ansari            rx-pins {
118*d3f891f1SRayyan Ansari                pins = "gpio5";
119*d3f891f1SRayyan Ansari                function = "blsp_uart2";
120*d3f891f1SRayyan Ansari                bias-pull-up;
121*d3f891f1SRayyan Ansari            };
122*d3f891f1SRayyan Ansari
123*d3f891f1SRayyan Ansari            tx-pins {
124*d3f891f1SRayyan Ansari                pins = "gpio4";
125*d3f891f1SRayyan Ansari                function = "blsp_uart2";
126*d3f891f1SRayyan Ansari                bias-disable;
127*d3f891f1SRayyan Ansari            };
128*d3f891f1SRayyan Ansari        };
129*d3f891f1SRayyan Ansari    };
130