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/linux/drivers/gpu/host1x/hw/
H A Dintr_hw.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2010-2013, NVIDIA Corporation.
17 struct host1x *host = irq_data->host; in syncpt_thresh_isr() local
19 unsigned int i, id; in syncpt_thresh_isr() local
21 for (i = irq_data->offset; i < DIV_ROUND_UP(host->info->nb_pts, 32); in syncpt_thresh_isr()
22 i += host->num_syncpt_irqs) { in syncpt_thresh_isr()
23 reg = host1x_sync_readl(host, in syncpt_thresh_isr()
26 host1x_sync_writel(host, reg, in syncpt_thresh_isr()
28 host1x_sync_writel(host, reg, in syncpt_thresh_isr()
31 for_each_set_bit(id, &reg, 32) in syncpt_thresh_isr()
[all …]
H A Dsyncpt_hw.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
19 struct host1x *host = sp->host; in syncpt_restore() local
21 host1x_sync_writel(host, min, HOST1X_SYNC_SYNCPT(sp->id)); in syncpt_restore()
30 struct host1x *host = sp->host; in syncpt_restore_wait_base() local
32 host1x_sync_writel(host, sp->base_val, in syncpt_restore_wait_base()
33 HOST1X_SYNC_SYNCPT_BASE(sp->id)); in syncpt_restore_wait_base()
43 struct host1x *host = sp->host; in syncpt_read_wait_base() local
45 sp->base_val = in syncpt_read_wait_base()
46 host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(sp->id)); in syncpt_read_wait_base()
[all …]
H A Ddebug_hw_1x01.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011-2013 NVIDIA Corporation
14 static void host1x_debug_show_channel_cdma(struct host1x *host, in host1x_debug_show_channel_cdma() argument
18 struct host1x_cdma *cdma = &ch->cdma; in host1x_debug_show_channel_cdma()
29 cbread = host1x_sync_readl(host, HOST1X_SYNC_CBREAD(ch->id)); in host1x_debug_show_channel_cdma()
30 cbstat = host1x_sync_readl(host, HOST1X_SYNC_CBSTAT(ch->id)); in host1x_debug_show_channel_cdma()
32 host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev)); in host1x_debug_show_channel_cdma()
35 !ch->cdma.push_buffer.mapped) { in host1x_debug_show_channel_cdma()
51 host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(base)); in host1x_debug_show_channel_cdma()
71 static void host1x_debug_show_channel_fifo(struct host1x *host, in host1x_debug_show_channel_fifo() argument
[all …]
H A Ddebug_hw_1x06.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011-2017 NVIDIA Corporation
14 static void host1x_debug_show_channel_cdma(struct host1x *host, in host1x_debug_show_channel_cdma() argument
18 struct host1x_cdma *cdma = &ch->cdma; in host1x_debug_show_channel_cdma()
43 host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev)); in host1x_debug_show_channel_cdma()
46 !ch->cdma.push_buffer.mapped) { in host1x_debug_show_channel_cdma()
66 static void host1x_debug_show_channel_fifo(struct host1x *host, in host1x_debug_show_channel_fifo() argument
77 host1x_debug_output(o, "%u: fifo:\n", ch->id); in host1x_debug_show_channel_fifo()
91 host1x_hypervisor_writel(host, 0x1, HOST1X_HV_ICG_EN_OVERRIDE); in host1x_debug_show_channel_fifo()
95 val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(ch->id); in host1x_debug_show_channel_fifo()
[all …]
/linux/drivers/gpu/host1x/
H A Dsyncpt.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2010-2015, NVIDIA Corporation.
10 #include <linux/dma-fence.h>
24 host1x_syncpt_base_request(struct host1x *host) in host1x_syncpt_base_request() argument
26 struct host1x_syncpt_base *bases = host->bases; in host1x_syncpt_base_request()
29 for (i = 0; i < host->info->nb_bases; i++) in host1x_syncpt_base_request()
33 if (i >= host->info->nb_bases) in host1x_syncpt_base_request()
43 base->requested = false; in host1x_syncpt_base_free()
47 * host1x_syncpt_alloc() - allocate a syncpoint
48 * @host: host1x device data
[all …]
H A Dintr.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2010-2021, NVIDIA Corporation.
19 list_for_each_entry_reverse(fence_in_list, &list->list, list) { in host1x_intr_add_fence_to_list()
20 if ((s32)(fence_in_list->threshold - fence->threshold) <= 0) { in host1x_intr_add_fence_to_list()
22 list_add(&fence->list, &fence_in_list->list); in host1x_intr_add_fence_to_list()
28 list_add(&fence->list, &list->list); in host1x_intr_add_fence_to_list()
31 static void host1x_intr_update_hw_state(struct host1x *host, struct host1x_syncpt *sp) in host1x_intr_update_hw_state() argument
35 if (!list_empty(&sp->fences.list)) { in host1x_intr_update_hw_state()
36 fence = list_first_entry(&sp->fences.list, struct host1x_syncpt_fence, list); in host1x_intr_update_hw_state()
38 host1x_hw_intr_set_syncpt_threshold(host, sp->id, fence->threshold); in host1x_intr_update_hw_state()
[all …]
H A Ddev.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2015, NVIDIA Corporation.
33 int (*init)(struct host1x_channel *channel, struct host1x *host,
34 unsigned int id);
56 void (*show_channel_cdma)(struct host1x *host,
59 void (*show_channel_fifo)(struct host1x *host,
62 void (*show_mlocks)(struct host1x *host, struct output *output);
74 void (*enable_protection)(struct host1x *host);
78 int (*init_host_sync)(struct host1x *host, u32 cpm);
80 struct host1x *host, unsigned int id, u32 thresh);
[all …]
H A Dchannel.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
19 chlist->channels = kcalloc(num_channels, sizeof(struct host1x_channel), in host1x_channel_list_init()
21 if (!chlist->channels) in host1x_channel_list_init()
22 return -ENOMEM; in host1x_channel_list_init()
24 chlist->allocated_channels = bitmap_zalloc(num_channels, GFP_KERNEL); in host1x_channel_list_init()
25 if (!chlist->allocated_channels) { in host1x_channel_list_init()
26 kfree(chlist->channels); in host1x_channel_list_init()
27 return -ENOMEM; in host1x_channel_list_init()
30 mutex_init(&chlist->lock); in host1x_channel_list_init()
[all …]
/linux/Documentation/driver-api/cxl/linux/example-configurations/
H A Dmulti-interleave.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Level Interleave
6 This cxl-cli configuration dump shows the following host configuration:
9 * CXL Root has Four (4) CXL Host Bridges
10 * Two CXL Host Bridges have a two CXL Memory Expanders Attached each.
11 * The CXL root is configured to interleave across the two host bridges.
12 * Each host bridge with expanders interleaves across two endpoints.
14 This output is generated by :code:`cxl list -v` and describes the relationships
28 "id":0
33 "id":4
[all …]
H A Dintra-hb-interleave.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Intra-Host-Bridge Interleave
6 This cxl-cli configuration dump shows the following host configuration:
9 * CXL Root has Four (4) CXL Host Bridges
10 * One (1) CXL Host Bridges has two CXL Memory Expanders Attached
11 * The Host bridge decoder is programmed to interleave across the expanders.
13 This output is generated by :code:`cxl list -v` and describes the relationships
27 "id":0
32 "id":4
37 "id":1
[all …]
H A Dhb-interleave.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Inter-Host-Bridge Interleave
6 This cxl-cli configuration dump shows the following host configuration:
9 * CXL Root has Four (4) CXL Host Bridges
10 * Two CXL Host Bridges have a single CXL Memory Expander Attached
11 * The CXL root is configured to interleave across the two host bridges.
13 This output is generated by :code:`cxl list -v` and describes the relationships
27 "id":0
32 "id":4
37 "id":1
[all …]
H A Dsingle-device.rst1 .. SPDX-License-Identifier: GPL-2.0
6 This cxl-cli configuration dump shows the following host configuration:
9 * CXL Root has Four (4) CXL Host Bridges
10 * One CXL Host Bridges has a single CXL Memory Expander Attached
13 This output is generated by :code:`cxl list -v` and describes the relationships
27 "id":0
32 "id":4
37 "id":1
42 "id":5
47 Host Bridges. The `Root` can be considered the singular upstream port attached
[all …]
/linux/drivers/scsi/arm/
H A Dacornscsi.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * 26-Sep-1997 RMK Re-jigged to use the queue module.
15 * Re-coded state machine to be based on driver
19 * 05-Oct-1997 RMK Implemented writing to SCSI devices.
20 * 06-Oct-1997 RMK Corrected small (non-serious) bug with the connect/
22 * 12-Oct-1997 RMK Added catch for re-entering interrupt routine.
23 * 15-Oct-1997 RMK Improved handling of commands.
24 * 27-Jun-1998 RMK Changed asm/delay.h to linux/delay.h.
25 * 13-Dec-1998 RMK Better abort code and command handling. Extra state
45 * SCSI-II Tagged queue support.
[all …]
/linux/drivers/scsi/
H A Dscsi_proc.c1 // SPDX-License-Identifier: GPL-2.0
10 * (c) 1995 Michael Neuffer neuffer@goofy.zdv.uni-mainz.de
14 * Andreas Heilwagen <crashcar@informatik.uni-koblenz.de>
51 * struct scsi_proc_entry - (host template, SCSI proc dir) association
53 * @sht: SCSI host template associated with the procfs directory.
54 * @proc_dir: procfs directory associated with the SCSI host template.
68 ssize_t ret = -ENOMEM; in proc_scsi_host_write()
72 return -EOVERFLOW; in proc_scsi_host_write()
74 if (!shost->hostt->write_info) in proc_scsi_host_write()
75 return -EINVAL; in proc_scsi_host_write()
[all …]
H A Dxen-scsifront.c95 #define RSLT_RESET_ERR -1
105 struct Scsi_Host *host; member
123 /* Following items are protected by the host lock. */
139 info->wait_ring_available = 0; in scsifront_wake_up()
140 wake_up(&info->wq_sync); in scsifront_wake_up()
148 spin_lock_irqsave(&info->shadow_lock, flags); in scsifront_get_rqid()
150 free = find_first_bit(info->shadow_free_bitmap, VSCSIIF_MAX_REQS); in scsifront_get_rqid()
151 __clear_bit(free, info->shadow_free_bitmap); in scsifront_get_rqid()
153 spin_unlock_irqrestore(&info->shadow_lock, flags); in scsifront_get_rqid()
158 static int _scsifront_put_rqid(struct vscsifrnt_info *info, uint32_t id) in _scsifront_put_rqid() argument
[all …]
H A Dzorro7xx.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * Rewritten to use 53c700.c by Kars de Jong <jongk@linux-m68k.org>
27 MODULE_AUTHOR("Alan Hourihane <alanh@fairlite.demon.co.uk> / Kars de Jong <jongk@linux-m68k.org>");
52 .id = ZORRO_PROD_PHASE5_BLIZZARD_603E_PLUS,
56 .id = ZORRO_PROD_MACROSYSTEMS_WARP_ENGINE_40xx,
60 .id = ZORRO_PROD_CBM_A4091_1,
64 .id = ZORRO_PROD_CBM_A4091_2,
68 .id = ZORRO_PROD_GVP_GFORCE_040_060,
78 struct Scsi_Host *host; in zorro7xx_init_one() local
84 zdd = (struct zorro_driver_data *)ent->driver_data; in zorro7xx_init_one()
[all …]
/linux/drivers/scsi/snic/
H A Dsnic_fwint.h1 /* SPDX-License-Identifier: GPL-2.0-only */
71 SNIC_STAT_ITMF_INCORRECT_LUN, /* itmf req has incorrect LUN id*/
81 * snic_io_hdr : host <--> firmware
100 snic_io_hdr_enc(struct snic_io_hdr *hdr, u8 typ, u8 status, u32 id, u32 hid, in snic_io_hdr_enc() argument
103 hdr->type = typ; in snic_io_hdr_enc()
104 hdr->status = status; in snic_io_hdr_enc()
105 hdr->protocol = 0; in snic_io_hdr_enc()
106 hdr->hid = cpu_to_le32(hid); in snic_io_hdr_enc()
107 hdr->cmnd_id = cpu_to_le32(id); in snic_io_hdr_enc()
108 hdr->sg_cnt = cpu_to_le16(sg_cnt); in snic_io_hdr_enc()
[all …]
/linux/drivers/nvme/target/
H A Dpassthru.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2017-2018 Western Digital Corporation or its
7 * Copyright (c) 2019-2020, Eideticom Inc.
13 #include "../host/nvme.h"
29 if (!nvme_multi_css(ctrl->subsys->passthru_ctrl)) in nvmet_passthrough_override_cap()
30 ctrl->cap &= ~(1ULL << 43); in nvmet_passthrough_override_cap()
35 struct nvmet_ctrl *ctrl = req->sq->ctrl; in nvmet_passthru_override_id_descs()
42 if (!ctrl->subsys->clear_ids) in nvmet_passthru_override_id_descs()
56 if (cur->nidl == 0) in nvmet_passthru_override_id_descs()
58 if (cur->nidt == NVME_NIDT_CSI) { in nvmet_passthru_override_id_descs()
[all …]
/linux/drivers/mmc/host/
H A Domap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/host/omap.c
18 #include <linux/dma-mapping.h>
23 #include <linux/mmc/host.h>
30 #include <linux/platform_data/mmc-omap.h>
74 #define mmc_omap7xx() (host->features & MMC_OMAP7XX)
75 #define mmc_omap15xx() (host->features & MMC_OMAP15XX)
76 #define mmc_omap16xx() (host->features & MMC_OMAP16XX)
78 #define mmc_omap1() (host->features & MMC_OMAP1_MASK)
81 #define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift) argument
[all …]
/linux/drivers/soc/qcom/
H A Dsmsm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
27 * read-write, while the rest should be considered read-only.
31 * each host's subscription bitmap should be queried and the remote system
34 * The subscription matrix is laid out in entry-major order:
63 * struct qcom_smsm - smsm driver context
72 * @lock: spinlock for read-modify-write of the outgoing state
98 * struct smsm_entry - per remote processor entry context
99 * @smsm: back-reference to driver context
123 * struct smsm_host - representation of a remote host
[all …]
/linux/drivers/ata/
H A Dlibata-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * libata-core.c - helper library for ATA
5 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
6 * Copyright 2003-2004 Jeff Garzik
9 * as Documentation/driver-api/libata.rst
12 * http://www.sata-io.org/
16 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
17 * http://www.sata-io.org (SATA)
19 * http://www.qic.org (QIC157 - Tape and DSC)
20 * http://www.ce-ata.org (CE-ATA: not supported)
[all …]
/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-is-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
26 /* Interrupt Generation Register 0 from Host CPU to VIC */
33 /* Interrupt Clear Register 0 from Host CPU to VIC */
40 /* Interrupt Mask Register 0 from Host CPU to VIC */
47 /* Interrupt Status Register 0 from Host CPU to VIC */
54 /* Interrupt Mask Status Register 0 from Host CPU to VIC */
61 /* Interrupt Generation Register 1 from ISP CPU to Host IC */
66 /* Interrupt Clear Register 1 from ISP CPU to Host IC */
71 /* Interrupt Mask Register 1 from ISP CPU to Host IC */
[all …]
/linux/tools/virtio/virtio-trace/
H A DREADME1 Trace Agent for virtio-trace
4 Trace agent is a user tool for sending trace data of a guest to a Host in low
6 - splice a page of ring-buffer to read_pipe without memory copying
7 - splice the page from write_pipe to virtio-console without memory copying
8 - write trace data to stdout by using -o option
9 - controlled by start/stop orders from a Host
15 3) A controller thread does poll() for a start order of a host.
16 4) After the controller of the trace agent receives a start order from a host,
18 5) The read/write threads start to read trace data from ring-buffers and
19 write the data to virtio-serial.
[all …]
/linux/Documentation/driver-api/cxl/platform/example-configurations/
H A Dhb-interleave.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Cross-Host-Bridge Interleave
6 This system has a single socket with two CXL host bridges. Each host bridge
11 * Cross-Bridge interleave is described.
13 * This SRAT describes one node for both host bridges.
18 Subtable Type : 00 [CXL Host Bridge Structure]
21 Associated host bridge : 00000007
27 Subtable Type : 00 [CXL Host Bridge Structure]
30 Associated host bridge : 00000006
63 Non-Volatile : 0
[all …]
/linux/drivers/net/ethernet/sfc/
H A Dfilter.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2013 Solarflare Communications Inc.
16 * enum efx_filter_match_flags - Flags for hardware filter match type
17 * @EFX_FILTER_MATCH_REM_HOST: Match by remote IP host address
18 * @EFX_FILTER_MATCH_LOC_HOST: Match by local IP host address
23 * @EFX_FILTER_MATCH_ETHER_TYPE: Match by Ether-type
24 * @EFX_FILTER_MATCH_INNER_VID: Match by inner VLAN ID
25 * @EFX_FILTER_MATCH_OUTER_VID: Match by outer VLAN ID
33 * - Huntington supports filter matching controlled by firmware, potentially
34 * using {TCP,UDP}/IPv{4,6} 4-tuple or local 2-tuple, local MAC or I/G bit,
[all …]

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