| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | renesas,rza1-pinctrl.txt | 4 named "Ports" in the hardware reference manual.
5 Pin multiplexing and GPIO configuration is performed on a per-pin basis
6 writing configuration values to per-port register sets.
12 -------------------
15 - compatible: should be:
16 - "renesas,r7s72100-ports": for RZ/A1H
17 - "renesas,r7s72101-ports", "renesas,r7s72100-ports": for RZ/A1M
18 - "renesas,r7s72102-ports": for RZ/A1L
20 - reg
22 hardware is mapped to.
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| H A D | renesas,rza1-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-port
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| H A D | qcom,pmic-mpp.txt | 1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
6 - compatible:
10 "qcom,pm8018-mpp",
11 "qcom,pm8019-mpp",
12 "qcom,pm8038-mpp",
13 "qcom,pm8058-mpp",
14 "qcom,pm8821-mpp",
15 "qcom,pm8841-mpp",
16 "qcom,pm8916-mpp",
17 "qcom,pm8917-mpp",
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| H A D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
9 Pull Up (PU) are driven by the related PIO block.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
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| /freebsd/share/man/man4/ |
| H A D | lpt.4 | 49 lpt is now arch-independent thanks to the ppbus interface.
56 is closed or when the entire buffer is sent in interrupt driven mode.
58 The driver can be configured to be either interrupt-driven, or
61 interrupt-driven can be switched to polled mode by using the
65 Depending on your hardware, extended capabilities may be configured with the
77 .Bl -tag -width Pa -compact
92 on-line, making it impossible to run
|
| H A D | fdt.4 | 40 is a mechanism for describing computer hardware resources, which cannot be
48 Configuration data, which cannot be self discovered in run-time, has to be
52 The idea is inherited from Open Firmware IEEE 1275 device-tree notion, and has
55 .Bl -bullet
57 Hardware platform resources are
60 self-enumerating information is gathered.
68 The kernel (driver) learns about hardware resources details and dependencies
70 any information about the underlying platform hardware resources in the kernel.
73 particular first-stage bootloader or firmware features.
82 hardware resources from a unified origin, which brings advantages to the
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| H A D | pcf8574.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
32 .Nd driver for the PCF8574 8-bit I2C IO expander
37 .Bd -ragged -offset indent
46 .Bd -literal -offset indent
55 The pins are quasi-bidirectional.
56 Only low output can be actively driven.
62 .Bl -tag -width "compatible"
73 .Bd -literal
96 that the hardware provides.
|
| H A D | aesni.4 | 35 .Bd -ragged -offset indent
44 .Bd -literal -offset indent
52 Encryption Standard (AES) symmetric cipher, and provides a hardware
79 is data-independent, thus eliminating some attack vectors based on
80 measuring cache use and timings typically present in table-driven
99 .An -nosplit
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| /freebsd/sys/contrib/device-tree/Bindings/nvmem/ |
| H A D | nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sriniva
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | dsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
26 reg-property set to the virtual channel number, usually there is just
33 clock-master:
37 another DSI host to drive the same peripheral. Hardware supporting
39 to be driven by the same clock. Only the DSI host instance
42 "#address-cells":
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mm-venice-gw72xx-0x-rs232-rts.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW72xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 rs485-en-hog {
20 gpio-hog;
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| H A D | imx8mm-venice-gw72xx-0x-rs232-rts.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW72xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw72xx-0x";
24 gpio-hog;
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| H A D | imx8mm-venice-gw73xx-0x-rs232-rts.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW73xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
24 gpio-hog;
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| H A D | imx8mm-venice-gw73xx-0x-rs232-rts.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW73xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
23 rs485-en-hog {
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| /freebsd/share/man/man4/man4.powerpc/ |
| H A D | ofw_console.4 | 1 .\"-
47 .Va input-device
49 .Va output-device
53 if the real console hardware can not be driven by
71 .Bl -tag -width ".Pa /dev/keyboard" -compact
77 .It Pa /dev/tty[a-z]
78 terminal device in case both the console input and output device is tty[a-z]
96 (or Stop-A)
105 in a ddb-enabled kernel, and enter the alternate BREAK sequence
106 (RETURN TILDE CTRL-b).
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| /freebsd/sys/dev/ow/ |
| H A D | owll_if.m | 1 #-
33 # Dallas Semiconductor 1-Wire bus Link Layer (owll)
36 # 1-Wire protocol specification.
39 # Note: 1-Wire is a registered trademark of Maxim Integrated Products, Inc.
43 # SoCs have a 1-Wire controller with more smarts or hardware offload.
45 # as well as both usb and i2c 1-Wire controllers.
68 # In the diagrams below, R is driven by the resistor pullup, M is driven by
69 # the master, and S is driven by the slave / target.
74 # Note: This is the polling / busy-wait interface. An interrupt-based interface
75 # may be different. But an interrupt-based, non-blocking interface can be tricky.
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| /freebsd/sys/contrib/device-tree/Bindings/leds/ |
| H A D | leds-lgm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lgm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Zhu, Yi Xin <Yixin.zhu@intel.com>
11 - Amireddy Mallikarjuna reddy <mallikarjunax.reddy@intel.com>
15 const: intel,lgm-ssoled
23 clock-names:
25 - const: sso
26 - const: fpid
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| /freebsd/sys/dev/uart/ |
| H A D | uart_if.m | 1 #-
36 # The UART hardware interface. The core UART code is hardware independent.
37 # The details of the hardware are abstracted by the UART hardware interface.
52 # attach() - attach hardware.
55 # high-level (ie tty) initialization has been done yet.
56 # The intend of this method is to setup the hardware for normal operation.
61 # detach() - detach hardware.
63 # is the first action performed, so even the high-level (ie tty) interface
65 # The intend of this method is to disable the hardware.
70 # flush() - flush FIFOs.
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| /freebsd/sys/contrib/device-tree/Bindings/hwmon/ |
| H A D | sensirion,shtc1.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schema
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| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | gpio-stp-xway.txt | 5 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
10 - compatible : Should be "lantiq,gpio-stp-xway"
11 - reg : Address and length of the register set for the device
12 - #gpio-cells : Should be two. The first cell is the pin number and
15 - gpio-controller : Marks the device node as a gpio controller.
18 - lantiq,shadow : The default value that we shall assume as already set on the
20 - lantiq,groups : Set the 3 bit mask to select which of the 3 groups are enabled
22 - lantiq,dsl : The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit
24 - lantiq,phy1 : The gphy1 core can control 3 bits of the gpio cascade.
25 - lantiq,phy2 : The gphy2 core can control 3 bits of the gpio cascade.
[all …]
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| H A D | gpio-stp-xway.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-stp-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
16 - John Crispin <john@phrozen.org>
20 pattern: "^gpio@[0-9a-f]+$"
23 const: lantiq,gpio-stp-xway
28 gpio-controller: true
30 "#gpio-cells":
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| /freebsd/share/man/man4/man4.i386/ |
| H A D | glxsb.4 | 27 .Bd -ragged -offset indent
35 .Bd -literal -offset indent
45 Driven by periodic checks for available data from the generator,
52 also supports acceleration of AES-128-CBC operations for
55 there is no hardware acceleration for those algorithms.
86 .An -nosplit
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| /freebsd/sys/contrib/device-tree/Bindings/soc/qcom/ |
| H A D | qcom,rpm-master-stats.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpm-master-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konradybcio@kernel.org>
16 (particularly around entering hardware-driven low power modes: XO shutdown
17 and total system-wide power collapse) are first made at Master-level, and
21 our device has entered the desired low-power mode, how long it took to do so,
26 This scheme has been used on various SoCs in the 2013-2023 era, with some
27 newer or higher-end designs providing this information through an SMEM query.
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | jedec,spi-nor.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: mtd.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
19 - items:
20 - pattern: "^((((micron|spansion|st),)?\
33 - const: jedec,spi-nor
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