xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/imx8mm-venice-gw72xx-0x-rs232-rts.dts (revision c9ccf3a32da427475985b85d7df023ccfb138c27)
1*c9ccf3a3SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*c9ccf3a3SEmmanuel Vadot/*
3*c9ccf3a3SEmmanuel Vadot * Copyright 2022 Gateworks Corporation
4*c9ccf3a3SEmmanuel Vadot *
5*c9ccf3a3SEmmanuel Vadot * GW72xx RS232 with RTS/CTS hardware flow control:
6*c9ccf3a3SEmmanuel Vadot *  - GPIO4_0 rs485_en needs to be driven low (in-active)
7*c9ccf3a3SEmmanuel Vadot *  - UART4_TX becomes RTS
8*c9ccf3a3SEmmanuel Vadot *  - UART4_RX becomes CTS
9*c9ccf3a3SEmmanuel Vadot */
10*c9ccf3a3SEmmanuel Vadot
11*c9ccf3a3SEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
12*c9ccf3a3SEmmanuel Vadot
13*c9ccf3a3SEmmanuel Vadot#include "imx8mm-pinfunc.h"
14*c9ccf3a3SEmmanuel Vadot
15*c9ccf3a3SEmmanuel Vadot/dts-v1/;
16*c9ccf3a3SEmmanuel Vadot/plugin/;
17*c9ccf3a3SEmmanuel Vadot
18*c9ccf3a3SEmmanuel Vadot&{/} {
19*c9ccf3a3SEmmanuel Vadot	compatible = "gw,imx8mm-gw72xx-0x";
20*c9ccf3a3SEmmanuel Vadot};
21*c9ccf3a3SEmmanuel Vadot
22*c9ccf3a3SEmmanuel Vadot&gpio4 {
23*c9ccf3a3SEmmanuel Vadot	rs485_en {
24*c9ccf3a3SEmmanuel Vadot		gpio-hog;
25*c9ccf3a3SEmmanuel Vadot		gpios = <0 GPIO_ACTIVE_HIGH>;
26*c9ccf3a3SEmmanuel Vadot		output-low;
27*c9ccf3a3SEmmanuel Vadot		line-name = "rs485_en";
28*c9ccf3a3SEmmanuel Vadot	};
29*c9ccf3a3SEmmanuel Vadot};
30*c9ccf3a3SEmmanuel Vadot
31*c9ccf3a3SEmmanuel Vadot&uart2 {
32*c9ccf3a3SEmmanuel Vadot	pinctrl-names = "default";
33*c9ccf3a3SEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart2>;
34*c9ccf3a3SEmmanuel Vadot	rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
35*c9ccf3a3SEmmanuel Vadot	cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
36*c9ccf3a3SEmmanuel Vadot	uart-has-rtscts;
37*c9ccf3a3SEmmanuel Vadot	status = "okay";
38*c9ccf3a3SEmmanuel Vadot};
39*c9ccf3a3SEmmanuel Vadot
40*c9ccf3a3SEmmanuel Vadot&uart4 {
41*c9ccf3a3SEmmanuel Vadot	status = "disabled";
42*c9ccf3a3SEmmanuel Vadot};
43*c9ccf3a3SEmmanuel Vadot
44*c9ccf3a3SEmmanuel Vadot&iomuxc {
45*c9ccf3a3SEmmanuel Vadot	pinctrl_uart2: uart2grp {
46*c9ccf3a3SEmmanuel Vadot		fsl,pins = <
47*c9ccf3a3SEmmanuel Vadot			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
48*c9ccf3a3SEmmanuel Vadot			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
49*c9ccf3a3SEmmanuel Vadot			MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29	0x140
50*c9ccf3a3SEmmanuel Vadot			MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28	0x140
51*c9ccf3a3SEmmanuel Vadot		>;
52*c9ccf3a3SEmmanuel Vadot	};
53*c9ccf3a3SEmmanuel Vadot};
54