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/linux/drivers/media/usb/stk1160/
H A Dstk1160-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * <elezegarcia--a.t--gmail.com>
10 * <rmthomas--a.t--sciolus.org>
19 /* Power-on Strapping Data */
39 * Bit 0 - Horizontal Decimation Control
42 * Bit 1 - Decimates Half or More Column
43 * 0 Decimates less than half from original column,
45 * 1 Decimates half or more from original column,
47 * Bit 2 - Vertical Decimation Control
50 * Bit 3 - Vertical Greater or Equal to Half
[all …]
/linux/arch/mips/include/asm/dec/
H A Dioasic_ints.h31 #define IO_INR_SCC0A_RXDMA 29 /* SCC0A receive half page */
41 #define IO_INR_SCC1A_RXDMA 25 /* SCC1A receive half page */
49 #define IO_INR_AB_TXDMA 27 /* ACCESS.bus transmit page end */
50 #define IO_INR_AB_TXERR 26 /* ACCESS.bus xmit memory read error */
51 #define IO_INR_AB_RXDMA 25 /* ACCESS.bus receive half page */
52 #define IO_INR_AB_RXERR 24 /* ACCESS.bus receive overrun */
61 * The lower 16 bits are system-specific and thus defined in
62 * system-specific headers.
H A Dinterrupts.h3 * with the machine-specific interrupt routines.
28 #define DEC_IRQ_AB_RECV 1 /* ACCESS.bus receive */
29 #define DEC_IRQ_AB_XMIT 2 /* ACCESS.bus transmit */
34 #define DEC_IRQ_HALT 7 /* HALT button or from ACCESS.Bus */
37 #define DEC_IRQ_BUS 10 /* memory, I/O bus read/write errors */
59 #define DEC_IRQ_SCC0A_RXDMA 30 /* SCC0A receive half page */
62 #define DEC_IRQ_AB_RXERR 33 /* ACCESS.bus receive overrun */
63 #define DEC_IRQ_AB_RXDMA 34 /* ACCESS.bus receive half page */
64 #define DEC_IRQ_AB_TXERR 35 /* ACCESS.bus xmit memory read/ovrn */
65 #define DEC_IRQ_AB_TXDMA 36 /* ACCESS.bus transmit page end */
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments GPMC Bus Child Nodes
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
15 represents any device connected to the GPMC bus. It may be a Flash chip,
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
[all …]
H A Dintel,ixp4xx-expansion-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral properties for Intel IXP4xx Expansion Bus
10 The IXP4xx expansion bus controller handles access to devices on the
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
18 intel,ixp4xx-eb-t1:
23 intel,ixp4xx-eb-t2:
[all …]
H A Dxlnx,zynq-ddrc-a05.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/xlnx,zynq-ddrc-a05.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Michal Simek <michal.simek@amd.com>
14 The Zynq DDR ECC controller has an optional ECC support in half-bus width
15 (16-bit) configuration. It is capable of correcting single bit ECC errors
20 const: xlnx,zynq-ddrc-a05
26 - compatible
[all …]
/linux/drivers/net/ethernet/cavium/liquidio/
H A Docteon_device.c7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
68 /* Max Txqs: Half for each of the two ports :max_iq/2 */
74 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
97 /* Max Txqs: Half for each of the two ports :max_iq/2 */
103 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
176 /* Max Txqs: Half for each of the two ports :max_iq/2 */
182 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
205 /* Max Txqs: Half for each of the two ports :max_iq/2 */
211 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
[all …]
/linux/Documentation/devicetree/bindings/i3c/
H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I3C bus
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
16 may, during the life of the bus, request mastership.
20 pattern: "^i3c@[0-9a-f]+$"
22 "#address-cells":
[all …]
/linux/Documentation/spi/
H A Dspidev.rst5 SPI devices have a limited userspace API, supporting basic half-duplex
19 * Prototyping in an environment that's not crash-prone; stray pointers
38 - struct spi_device_id spidev_spi_ids[]: list of devices that can be
42 - struct of_device_id spidev_dt_ids[]: list of devices that can be
46 - struct acpi_device_id spidev_acpi_ids[]: list of devices that can
52 post a patch for spidev to the linux-spi@vger.kernel.org mailing list.
66 echo spidev > /sys/bus/spi/devices/spiB.C/driver_override
67 echo spiB.C > /sys/bus/spi/drivers/spidev/bind
74 For a SPI device with chipselect C on bus B, you should see:
101 Since this is a standard Linux device driver -- even though it just happens
[all …]
H A Dspi-summary.rst5 02-Feb-2012
8 ------------
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
41 - Words are usually sent with their most significant bit (MSB) first,
44 - Sometimes SPI is used to daisy-chain devices, like shift registers.
51 SPI is only one of the names used by such four-wire protocols, and
[all …]
/linux/Documentation/devicetree/bindings/watchdog/
H A Dairoha,en7581-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/airoha,en7581-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
13 - $ref: watchdog.yaml#
17 const: airoha,en7581-wdt
23 description: BUS clock (timer ticks at half the BUS clock)
26 clock-names:
27 const: bus
[all …]
/linux/Documentation/networking/device_drivers/ethernet/3com/
H A D3c509.rst1 .. SPDX-License-Identifier: GPL-2.0
21 ethercards in Linux. These cards are commonly known by the most widely-used
22 card's 3Com model number, 3c509. They are all 10mb/s ISA-bus cards and shouldn't
23 be (but sometimes are) confused with the similarly-numbered PCI-bus "3c905"
28 - 3c509 (original ISA card)
29 - 3c509B (later revision of the ISA card; supports full-duplex)
30 - 3c589 (PCMCIA)
31 - 3c589B (later revision of the 3c589; supports full-duplex)
32 - 3c579 (EISA)
45 The driver allows boot- or load-time overriding of the card's detected IOADDR,
[all …]
H A Dvortex.rst1 .. SPDX-License-Identifier: GPL-2.0
20 - Andrew Morton
21 - Netdev mailing list <netdev@vger.kernel.org>
22 - Linux kernel mailing list <linux-kernel@vger.kernel.org>
28 Since kernel 2.3.99-pre6, this driver incorporates the support for the
29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c.
33 - 3c590 Vortex 10Mbps
34 - 3c592 EISA 10Mbps Demon/Vortex
35 - 3c597 EISA Fast Demon/Vortex
36 - 3c595 Vortex 100baseTx
[all …]
/linux/Documentation/devicetree/bindings/serial/
H A Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_irongate.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * IRONGATE is the internal name for the AMD-751 K7 core logic chipset
10 * which provides memory controller and PCI access for NAUTILUS-based
21 * The 21264 supports, and internally recognizes, a 44-bit physical
24 * half of the physical address space (PA[43]=0) and I/O address space
25 * resides in the upper half of the physical address space (PA[43]=1).
30 * through the routines given is 32-bit.
38 igcsr32 dev_vendor; /* 0x00 - device ID, vendor ID */
39 igcsr32 stat_cmd; /* 0x04 - status, command */
40 igcsr32 class; /* 0x08 - class code, rev ID */
[all …]
/linux/Documentation/networking/device_drivers/ethernet/cirrus/
H A Dcs89x0.rst1 .. SPDX-License-Identifier: GPL-2.0
33 2.1 CS8900-based Adapter Configuration
34 2.2 CS8920-based Adapter Configuration
46 5.2.1 Diagnostic Self-Test
66 The CS8900-based ISA Ethernet Adapters from Cirrus Logic follow
67 IEEE 802.3 standards and support half or full-duplex operation in ISA bus
69 in 16-bit ISA or EISA bus expansion slots and are available in
70 10BaseT-only or 3-media configurations (10BaseT, 10Base2, and AUI for 10Base-5
73 CS8920-based adapters are similar to the CS8900-based adapter with additional
85 or loaded at run-time as a device driver module.
[all …]
/linux/drivers/net/phy/
H A Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
33 #include <linux/pse-pd/pse.h>
44 #include "phylib-internal.h"
45 #include "phy-caps.h"
149 /* 10/100 half/full*/ in features_init()
162 /* 10 half, P2MP, TP */ in features_init()
167 /* 10/100 half/full + 1000 half/full */ in features_init()
178 /* 10/100 half/full + 1000 half/full + fibre*/ in features_init()
190 /* 10/100 half/full + 1000 half/full + 10G full*/ in features_init()
214 put_device(&phydev->mdio.dev); in phy_device_free()
[all …]
/linux/Documentation/devicetree/bindings/dma/stm32/
H A Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
32 0x1: half-word (16bit)
[all …]
/linux/include/linux/amba/
H A Dpl022.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2008-2009 ST-Ericsson AB
11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
31 * enum ssp_interface - interfaces allowed for this SSP Controller
48 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
56 * enum ssp_clock_params - clock parameters, to set SSP clock at a
65 * enum ssp_rx_endian - endianess of Rx FIFO Data
74 * enum ssp_tx_endian - endianess of Tx FIFO Data
82 * enum ssp_data_size - number of bits in one data element
98 * enum ssp_mode - SSP mode of operation (Communication modes)
[all …]
/linux/drivers/mtd/devices/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 one-time-programmable (OTP) data. The first half may be written
79 other key product data. The second half is programmed with a
[all …]
/linux/drivers/ssb/
H A Dsprom.c5 * Copyright (C) 2005-2008 Michael Buesch <m@bues.ch>
6 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
29 pos += scnprintf(buf + pos, buf_len - pos - 1, in sprom2hex()
31 pos += scnprintf(buf + pos, buf_len - pos - 1, "\n"); in sprom2hex()
45 c = dump[len - 1]; in hex2sprom()
48 len--; in hex2sprom()
52 return -EINVAL; in hex2sprom()
66 /* Common sprom device-attribute show-handler */
67 ssize_t ssb_attr_sprom_show(struct ssb_bus *bus, char *buf, in ssb_attr_sprom_show() argument
68 int (*sprom_read)(struct ssb_bus *bus, u16 *sprom)) in ssb_attr_sprom_show() argument
[all …]
/linux/arch/sparc/include/asm/
H A Dbbc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
12 /* Register sizes are indicated by "B" (Byte, 1-byte),
13 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
29 #define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */
30 #define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */
38 #define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */
39 #define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
40 #define BBC_I2C_1_S1 0x30 /* [B] I2C ctrlr-1 reg S1 */
41 #define BBC_I2C_1_S0 0x31 /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
[all …]
/linux/drivers/slimbus/
H A Dslimbus.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2011-2017, The Linux Foundation
79 /* Indicate that the frequency of the flow and the bus frequency are locked */
91 * struct slim_framer - Represents SLIMbus framer.
93 * responsible for clocking the bus.
94 * Manager is responsible for framer hand-over.
98 * frequency ('clock gear 10') at which the bus can operate.
111 * struct slim_msg_txn - Message to be sent by the controller.
120 * (relevant for message-codes involving read operation)
156 * bus. If this succeeds, state changes to SLIM_CLK_PAUSED. If the
[all …]
/linux/drivers/nvdimm/
H A Dbadrange.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include "nd-core.h"
21 INIT_LIST_HEAD(&badrange->list); in badrange_init()
22 spin_lock_init(&badrange->lock); in badrange_init()
29 lockdep_assert_held(&badrange->lock); in append_badrange_entry()
30 bre->start = addr; in append_badrange_entry()
31 bre->length = length; in append_badrange_entry()
32 list_add_tail(&bre->list, &badrange->list); in append_badrange_entry()
42 return -ENOMEM; in alloc_and_append_badrange_entry()
52 spin_unlock(&badrange->lock); in add_badrange()
[all …]
/linux/drivers/sh/maple/
H A Dmaple.c2 * Core maple bus functionality
4 * Copyright (C) 2007 - 2009 Adrian McMenamin
5 * Copyright (C) 2001 - 2008 Paul Mundt
6 * Copyright (C) 2000 - 2001 YAEGASHI Takeshi
21 #include <linux/dma-mapping.h>
31 MODULE_DESCRIPTION("Maple bus driver for Dreamcast");
65 * maple_driver_register - register a maple driver
68 * Registers the passed in @drv, while updating the bus type.
74 return -EINVAL; in maple_driver_register()
76 drv->drv.bus = &maple_bus_type; in maple_driver_register()
[all …]

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