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/linux/Documentation/devicetree/bindings/clock/
H A Dgoogle,gs101-clock.yaml4 $id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
7 title: Google GS101 SoC clock controller
13 Google GS101 clock controller is comprised of several CMU units, generating
25 'dt-bindings/clock/gs101.h' header.
30 - google,gs101-cmu-top
31 - google,gs101-cmu-apm
32 - google,gs101-cmu-misc
33 - google,gs101-cmu-hsi0
34 - google,gs101-cmu-hsi2
35 - google,gs101-cmu-peric0
[all …]
/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101.dtsi3 * GS101 SoC
9 #include <dt-bindings/clock/google,gs101.h>
15 compatible = "google,gs101";
201 compatible = "google,gs101-acpm-ipc";
287 compatible = "google,gs101-cmu-misc";
296 compatible = "google,gs101-mct",
316 compatible = "google,gs101-wdt";
328 compatible = "google,gs101-wdt";
363 compatible = "google,gs101-cmu-peric0";
373 compatible = "google,gs101-peric0-sysreg", "syscon";
[all …]
H A Dgs101-raven.dts11 #include "gs101-pixel-common.dtsi"
15 compatible = "google,gs101-raven", "google,gs101";
H A Dgs101-oriole.dts11 #include "gs101-pixel-common.dtsi"
15 compatible = "google,gs101-oriole", "google,gs101";
H A DMakefile4 gs101-oriole.dtb \
5 gs101-raven.dtb
H A Dgs101-pinctrl.h3 * Pinctrl binding constants for GS101
21 /* GS101 drive strengths */
H A Dgs101-pixel-common.dtsi3 * Device Tree nodes common for all GS101-based Pixel
14 #include "gs101-pinctrl.h"
15 #include "gs101.dtsi"
/linux/Documentation/devicetree/bindings/arm/
H A Dgoogle.yaml16 Currently upstream this is devices using "gs101" SoC which is found in Pixel
22 - SoC ID ("gs101")
30 e.g. gs101 and gs101-oriole.
40 - google,gs101-oriole
41 - google,gs101-raven
42 - const: google,gs101
/linux/Documentation/devicetree/bindings/soc/samsung/
H A Dsamsung,exynos-sysreg.yaml17 - google,gs101-apm-sysreg
18 - google,gs101-hsi2-sysreg
19 - google,gs101-peric0-sysreg
20 - google,gs101-peric1-sysreg
85 - google,gs101-hsi2-sysreg
86 - google,gs101-peric0-sysreg
87 - google,gs101-peric1-sysreg
H A Dexynos-pmu.yaml18 - google,gs101-pmu
39 - google,gs101-pmu
202 - google,gs101-pmu
H A Dexynos-usi.yaml38 - google,gs101-usi
/linux/Documentation/devicetree/bindings/watchdog/
H A Dsamsung-wdt.yaml21 - google,gs101-wdt # for Google gs101
54 Exynos990 or Google gs101).
60 Exynos5420, Exynos7, Exynos850, Exynos990 and gs101).
76 - google,gs101-wdt
92 - google,gs101-wdt
/linux/Documentation/devicetree/bindings/soc/google/
H A Dgoogle,gs101-pmu-intr-gen.yaml4 $id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml#
18 - const: google,gs101-pmu-intr-gen
33 compatible = "google,gs101-pmu-intr-gen", "syscon";
/linux/Documentation/devicetree/bindings/firmware/
H A Dgoogle,gs101-acpm-ipc.yaml5 $id: http://devicetree.org/schemas/firmware/google,gs101-acpm-ipc.yaml#
25 const: google,gs101-acpm-ipc
58 compatible = "google,gs101-acpm-ipc";
/linux/Documentation/devicetree/bindings/power/reset/
H A Dsyscon-reboot.yaml26 - google,gs101-reboot
65 const: google,gs101-reboot
97 compatible = "google,gs101-reboot";
/linux/Documentation/devicetree/bindings/usb/
H A Dsamsung,exynos-dwc3.yaml16 - google,gs101-dwusb3
69 const: google,gs101-dwusb3
/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm64.c1678 /* pin banks of gs101 pin-controller (ALIVE) */
1690 /* pin banks of gs101 pin-controller (FAR_ALIVE) */
1698 /* pin banks of gs101 pin-controller (GSACORE) */
1705 /* pin banks of gs101 pin-controller (GSACTRL) */
1710 /* pin banks of gs101 pin-controller (PERIC0) */
1734 /* pin banks of gs101 pin-controller (PERIC1) */
1746 /* pin banks of gs101 pin-controller (HSI1) */
1752 /* pin banks of gs101 pin-controller (HSI2) */
1761 /* pin banks of gs101 pin-controller (ALIVE) */
1768 /* pin banks of gs101 pin-controller (FAR_ALIVE) */
[all …]
H A Dpinctrl-samsung.h147 * @eint_fltcon_offset: GS101 SoC-specific EINT filter config register offset.
180 * @eint_fltcon_offset: GS101 SoC-specific EINT filter config register offset.
/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,usb3-drd-phy.yaml28 - google,gs101-usb31drd-phy
125 const: google,gs101-usb31drd-phy
/linux/drivers/soc/samsung/
H A Dexynos-pmu.c51 * Note: This SMC interface is known to be implemented on gs101 and derivative
236 .compatible = "google,gs101-pmu",
/linux/drivers/clk/samsung/
H A Dclk-gs101.c6 * Common Clock Framework support for GS101.
14 #include <dt-bindings/clock/google,gs101.h>
1444 CLK_OF_DECLARE(gs101_cmu_top, "google,gs101-cmu-top",
3435 CLK_OF_DECLARE(gs101_cmu_misc, "google,gs101-cmu-misc",
4389 .compatible = "google,gs101-cmu-apm",
4392 .compatible = "google,gs101-cmu-hsi0",
4395 .compatible = "google,gs101-cmu-hsi2",
4398 .compatible = "google,gs101-cmu-peric0",
4401 .compatible = "google,gs101-cmu-peric1",
4409 .name = "gs101-cmu",
/linux/drivers/power/reset/
H A Dsyscon-reboot.c148 { .compatible = "google,gs101-reboot", .data = &gs101_reboot_data },
/linux/Documentation/devicetree/bindings/spi/
H A Dsamsung,spi.yaml20 - google,gs101-spi
/linux/drivers/tty/serial/
H A Dsamsung_tty.c2511 .name = "Google GS101 UART",
2634 .name = "gs101-uart",
2660 { .compatible = "google,gs101-uart",
2837 /* gs101 always expects MMIO32 register accesses. */ in gs101_early_console_setup()
2843 OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup);
/linux/drivers/usb/dwc3/
H A Ddwc3-exynos.c219 .compatible = "google,gs101-dwusb3",

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