1221173a3SKrzysztof Kozlowski /* SPDX-License-Identifier: GPL-2.0+ */ 2ebe629a3SSachin Kamat /* 3ebe629a3SSachin Kamat * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. 4ebe629a3SSachin Kamat * 5ebe629a3SSachin Kamat * Copyright (c) 2012 Samsung Electronics Co., Ltd. 6ebe629a3SSachin Kamat * http://www.samsung.com 7ebe629a3SSachin Kamat * Copyright (c) 2012 Linaro Ltd 8ebe629a3SSachin Kamat * http://www.linaro.org 9ebe629a3SSachin Kamat * 10ebe629a3SSachin Kamat * Author: Thomas Abraham <thomas.ab@samsung.com> 11ebe629a3SSachin Kamat */ 12ebe629a3SSachin Kamat 13ebe629a3SSachin Kamat #ifndef __PINCTRL_SAMSUNG_H 14ebe629a3SSachin Kamat #define __PINCTRL_SAMSUNG_H 15ebe629a3SSachin Kamat 16ebe629a3SSachin Kamat #include <linux/pinctrl/pinctrl.h> 17ebe629a3SSachin Kamat #include <linux/pinctrl/pinmux.h> 18ebe629a3SSachin Kamat #include <linux/pinctrl/pinconf.h> 19ebe629a3SSachin Kamat #include <linux/pinctrl/consumer.h> 20ebe629a3SSachin Kamat #include <linux/pinctrl/machine.h> 21ebe629a3SSachin Kamat 221c5fb66aSLinus Walleij #include <linux/gpio/driver.h> 23ebe629a3SSachin Kamat 24ebe629a3SSachin Kamat /** 25ebe629a3SSachin Kamat * enum pincfg_type - possible pin configuration types supported. 26ebe629a3SSachin Kamat * @PINCFG_TYPE_FUNC: Function configuration. 27ebe629a3SSachin Kamat * @PINCFG_TYPE_DAT: Pin value configuration. 28ebe629a3SSachin Kamat * @PINCFG_TYPE_PUD: Pull up/down configuration. 29ebe629a3SSachin Kamat * @PINCFG_TYPE_DRV: Drive strength configuration. 30ebe629a3SSachin Kamat * @PINCFG_TYPE_CON_PDN: Pin function in power down mode. 31ebe629a3SSachin Kamat * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode. 32ebe629a3SSachin Kamat */ 33ebe629a3SSachin Kamat enum pincfg_type { 34ebe629a3SSachin Kamat PINCFG_TYPE_FUNC, 35ebe629a3SSachin Kamat PINCFG_TYPE_DAT, 36ebe629a3SSachin Kamat PINCFG_TYPE_PUD, 37ebe629a3SSachin Kamat PINCFG_TYPE_DRV, 38ebe629a3SSachin Kamat PINCFG_TYPE_CON_PDN, 39ebe629a3SSachin Kamat PINCFG_TYPE_PUD_PDN, 40ebe629a3SSachin Kamat 41ebe629a3SSachin Kamat PINCFG_TYPE_NUM 42ebe629a3SSachin Kamat }; 43ebe629a3SSachin Kamat 44ebe629a3SSachin Kamat /* 45ebe629a3SSachin Kamat * pin configuration (pull up/down and drive strength) type and its value are 46ebe629a3SSachin Kamat * packed together into a 16-bits. The upper 8-bits represent the configuration 47ebe629a3SSachin Kamat * type and the lower 8-bits hold the value of the configuration type. 48ebe629a3SSachin Kamat */ 49ebe629a3SSachin Kamat #define PINCFG_TYPE_MASK 0xFF 50ebe629a3SSachin Kamat #define PINCFG_VALUE_SHIFT 8 51ebe629a3SSachin Kamat #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT) 52ebe629a3SSachin Kamat #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type) 53ebe629a3SSachin Kamat #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK) 54ebe629a3SSachin Kamat #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \ 55ebe629a3SSachin Kamat PINCFG_VALUE_SHIFT) 563eb12bceSKrzysztof Kozlowski /* 573eb12bceSKrzysztof Kozlowski * Values for the pin CON register, choosing pin function. 583eb12bceSKrzysztof Kozlowski * The basic set (input and output) are same between: S3C24xx, S3C64xx, S5PV210, 593eb12bceSKrzysztof Kozlowski * Exynos ARMv7, Exynos ARMv8, Tesla FSD. 603eb12bceSKrzysztof Kozlowski */ 613eb12bceSKrzysztof Kozlowski #define PIN_CON_FUNC_INPUT 0x0 623eb12bceSKrzysztof Kozlowski #define PIN_CON_FUNC_OUTPUT 0x1 633eb12bceSKrzysztof Kozlowski 64ebe629a3SSachin Kamat /** 65ebe629a3SSachin Kamat * enum eint_type - possible external interrupt types. 66ebe629a3SSachin Kamat * @EINT_TYPE_NONE: bank does not support external interrupts 67ebe629a3SSachin Kamat * @EINT_TYPE_GPIO: bank supportes external gpio interrupts 68ebe629a3SSachin Kamat * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts 69ebe629a3SSachin Kamat * @EINT_TYPE_WKUP_MUX: bank supports multiplexed external wakeup interrupts 70ebe629a3SSachin Kamat * 71ebe629a3SSachin Kamat * Samsung GPIO controller groups all the available pins into banks. The pins 72ebe629a3SSachin Kamat * in a pin bank can support external gpio interrupts or external wakeup 73ebe629a3SSachin Kamat * interrupts or no interrupts at all. From a software perspective, the only 74ebe629a3SSachin Kamat * difference between external gpio and external wakeup interrupts is that 75ebe629a3SSachin Kamat * the wakeup interrupts can additionally wakeup the system if it is in 76ebe629a3SSachin Kamat * suspended state. 77ebe629a3SSachin Kamat */ 78ebe629a3SSachin Kamat enum eint_type { 79ebe629a3SSachin Kamat EINT_TYPE_NONE, 80ebe629a3SSachin Kamat EINT_TYPE_GPIO, 81ebe629a3SSachin Kamat EINT_TYPE_WKUP, 82ebe629a3SSachin Kamat EINT_TYPE_WKUP_MUX, 83ebe629a3SSachin Kamat }; 84ebe629a3SSachin Kamat 85ebe629a3SSachin Kamat /* maximum length of a pin in pin descriptor (example: "gpa0-0") */ 86ebe629a3SSachin Kamat #define PIN_NAME_LENGTH 10 87ebe629a3SSachin Kamat 88ebe629a3SSachin Kamat #define PIN_GROUP(n, p, f) \ 89ebe629a3SSachin Kamat { \ 90ebe629a3SSachin Kamat .name = n, \ 91ebe629a3SSachin Kamat .pins = p, \ 92ebe629a3SSachin Kamat .num_pins = ARRAY_SIZE(p), \ 93ebe629a3SSachin Kamat .func = f \ 94ebe629a3SSachin Kamat } 95ebe629a3SSachin Kamat 96ebe629a3SSachin Kamat #define PMX_FUNC(n, g) \ 97ebe629a3SSachin Kamat { \ 98ebe629a3SSachin Kamat .name = n, \ 99ebe629a3SSachin Kamat .groups = g, \ 100ebe629a3SSachin Kamat .num_groups = ARRAY_SIZE(g), \ 101ebe629a3SSachin Kamat } 102ebe629a3SSachin Kamat 103ebe629a3SSachin Kamat struct samsung_pinctrl_drv_data; 104ebe629a3SSachin Kamat 105ebe629a3SSachin Kamat /** 106ebe629a3SSachin Kamat * struct samsung_pin_bank_type: pin bank type description 107ebe629a3SSachin Kamat * @fld_width: widths of configuration bitfields (0 if unavailable) 108ebe629a3SSachin Kamat * @reg_offset: offsets of configuration registers (don't care of width is 0) 109ebe629a3SSachin Kamat */ 110ebe629a3SSachin Kamat struct samsung_pin_bank_type { 111ebe629a3SSachin Kamat u8 fld_width[PINCFG_TYPE_NUM]; 112ebe629a3SSachin Kamat u8 reg_offset[PINCFG_TYPE_NUM]; 113ebe629a3SSachin Kamat }; 114ebe629a3SSachin Kamat 115ebe629a3SSachin Kamat /** 1168100cf47STomasz Figa * struct samsung_pin_bank_data: represent a controller pin-bank (init data). 117ebe629a3SSachin Kamat * @type: type of the bank (register offsets and bitfield widths) 118ebe629a3SSachin Kamat * @pctl_offset: starting offset of the pin-bank registers. 1198b1bd11cSChanwoo Choi * @pctl_res_idx: index of base address for pin-bank registers. 120ebe629a3SSachin Kamat * @nr_pins: number of pins included in this bank. 121ebe629a3SSachin Kamat * @eint_func: function to set in CON register to configure pin as EINT. 122ebe629a3SSachin Kamat * @eint_type: type of the external interrupt supported by the bank. 123ebe629a3SSachin Kamat * @eint_mask: bit mask of pins which support EINT function. 1248100cf47STomasz Figa * @eint_offset: SoC-specific EINT register or interrupt offset of bank. 125884fdaa5SJaewon Kim * @eint_con_offset: ExynosAuto SoC-specific EINT control register offset of bank. 126884fdaa5SJaewon Kim * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank. 127884fdaa5SJaewon Kim * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank. 128ebe629a3SSachin Kamat * @name: name to be prefixed for each pin in this pin bank. 1298100cf47STomasz Figa */ 1308100cf47STomasz Figa struct samsung_pin_bank_data { 1318100cf47STomasz Figa const struct samsung_pin_bank_type *type; 1328100cf47STomasz Figa u32 pctl_offset; 1338b1bd11cSChanwoo Choi u8 pctl_res_idx; 1348100cf47STomasz Figa u8 nr_pins; 1358100cf47STomasz Figa u8 eint_func; 1368100cf47STomasz Figa enum eint_type eint_type; 1378100cf47STomasz Figa u32 eint_mask; 1388100cf47STomasz Figa u32 eint_offset; 139884fdaa5SJaewon Kim u32 eint_con_offset; 140884fdaa5SJaewon Kim u32 eint_mask_offset; 141884fdaa5SJaewon Kim u32 eint_pend_offset; 1428100cf47STomasz Figa const char *name; 1438100cf47STomasz Figa }; 1448100cf47STomasz Figa 1458100cf47STomasz Figa /** 1468100cf47STomasz Figa * struct samsung_pin_bank: represent a controller pin-bank. 1478100cf47STomasz Figa * @type: type of the bank (register offsets and bitfield widths) 1488b1bd11cSChanwoo Choi * @pctl_base: base address of the pin-bank registers 1498100cf47STomasz Figa * @pctl_offset: starting offset of the pin-bank registers. 1508100cf47STomasz Figa * @nr_pins: number of pins included in this bank. 1518b1bd11cSChanwoo Choi * @eint_base: base address of the pin-bank EINT registers. 1528100cf47STomasz Figa * @eint_func: function to set in CON register to configure pin as EINT. 1538100cf47STomasz Figa * @eint_type: type of the external interrupt supported by the bank. 1548100cf47STomasz Figa * @eint_mask: bit mask of pins which support EINT function. 1558100cf47STomasz Figa * @eint_offset: SoC-specific EINT register or interrupt offset of bank. 156884fdaa5SJaewon Kim * @eint_con_offset: ExynosAuto SoC-specific EINT register or interrupt offset of bank. 157884fdaa5SJaewon Kim * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank. 158884fdaa5SJaewon Kim * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank. 1598100cf47STomasz Figa * @name: name to be prefixed for each pin in this pin bank. 160bf128c1fSMateusz Majewski * @id: id of the bank, propagated to the pin range. 1618100cf47STomasz Figa * @pin_base: starting pin number of the bank. 1628100cf47STomasz Figa * @soc_priv: per-bank private data for SoC-specific code. 163ebe629a3SSachin Kamat * @of_node: OF node of the bank. 164ebe629a3SSachin Kamat * @drvdata: link to controller driver data 165ebe629a3SSachin Kamat * @irq_domain: IRQ domain of the bank. 166ebe629a3SSachin Kamat * @gpio_chip: GPIO chip of the bank. 167ebe629a3SSachin Kamat * @grange: linux gpio pin range supported by this bank. 1680d3d30dbSAbhilash Kesavan * @irq_chip: link to irq chip for external gpio and wakeup interrupts. 169ebe629a3SSachin Kamat * @slock: spinlock protecting bank registers 170ebe629a3SSachin Kamat * @pm_save: saved register values during suspend 171ebe629a3SSachin Kamat */ 172ebe629a3SSachin Kamat struct samsung_pin_bank { 17394ce944bSTomasz Figa const struct samsung_pin_bank_type *type; 1748b1bd11cSChanwoo Choi void __iomem *pctl_base; 175ebe629a3SSachin Kamat u32 pctl_offset; 176ebe629a3SSachin Kamat u8 nr_pins; 1778b1bd11cSChanwoo Choi void __iomem *eint_base; 178ebe629a3SSachin Kamat u8 eint_func; 179ebe629a3SSachin Kamat enum eint_type eint_type; 180ebe629a3SSachin Kamat u32 eint_mask; 181ebe629a3SSachin Kamat u32 eint_offset; 182884fdaa5SJaewon Kim u32 eint_con_offset; 183884fdaa5SJaewon Kim u32 eint_mask_offset; 184884fdaa5SJaewon Kim u32 eint_pend_offset; 1858100cf47STomasz Figa const char *name; 186bf128c1fSMateusz Majewski u32 id; 1878100cf47STomasz Figa 1888100cf47STomasz Figa u32 pin_base; 189ebe629a3SSachin Kamat void *soc_priv; 190492fca28SAndy Shevchenko struct fwnode_handle *fwnode; 191ebe629a3SSachin Kamat struct samsung_pinctrl_drv_data *drvdata; 192ebe629a3SSachin Kamat struct irq_domain *irq_domain; 193ebe629a3SSachin Kamat struct gpio_chip gpio_chip; 194ebe629a3SSachin Kamat struct pinctrl_gpio_range grange; 1950d3d30dbSAbhilash Kesavan struct exynos_irq_chip *irq_chip; 1961f306ecbSChanho Park raw_spinlock_t slock; 197ebe629a3SSachin Kamat 198ebe629a3SSachin Kamat u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/ 199ebe629a3SSachin Kamat }; 200ebe629a3SSachin Kamat 201ebe629a3SSachin Kamat /** 2021fc8ad86SMarek Szyprowski * struct samsung_retention_data: runtime pin-bank retention control data. 2031fc8ad86SMarek Szyprowski * @regs: array of PMU registers to control pad retention. 2041fc8ad86SMarek Szyprowski * @nr_regs: number of registers in @regs array. 2051fc8ad86SMarek Szyprowski * @value: value to store to registers to turn off retention. 2061fc8ad86SMarek Szyprowski * @refcnt: atomic counter if retention control affects more than one bank. 2071fc8ad86SMarek Szyprowski * @priv: retention control code private data 2081fc8ad86SMarek Szyprowski * @enable: platform specific callback to enter retention mode. 2091fc8ad86SMarek Szyprowski * @disable: platform specific callback to exit retention mode. 2101fc8ad86SMarek Szyprowski **/ 2111fc8ad86SMarek Szyprowski struct samsung_retention_ctrl { 2121fc8ad86SMarek Szyprowski const u32 *regs; 2131fc8ad86SMarek Szyprowski int nr_regs; 2141fc8ad86SMarek Szyprowski u32 value; 2151fc8ad86SMarek Szyprowski atomic_t *refcnt; 2161fc8ad86SMarek Szyprowski void *priv; 2171fc8ad86SMarek Szyprowski void (*enable)(struct samsung_pinctrl_drv_data *); 2181fc8ad86SMarek Szyprowski void (*disable)(struct samsung_pinctrl_drv_data *); 2191fc8ad86SMarek Szyprowski }; 2201fc8ad86SMarek Szyprowski 2211fc8ad86SMarek Szyprowski /** 2221fc8ad86SMarek Szyprowski * struct samsung_retention_data: represent a pin-bank retention control data. 2231fc8ad86SMarek Szyprowski * @regs: array of PMU registers to control pad retention. 2241fc8ad86SMarek Szyprowski * @nr_regs: number of registers in @regs array. 2251fc8ad86SMarek Szyprowski * @value: value to store to registers to turn off retention. 2261fc8ad86SMarek Szyprowski * @refcnt: atomic counter if retention control affects more than one bank. 2271fc8ad86SMarek Szyprowski * @init: platform specific callback to initialize retention control. 2281fc8ad86SMarek Szyprowski **/ 2291fc8ad86SMarek Szyprowski struct samsung_retention_data { 2301fc8ad86SMarek Szyprowski const u32 *regs; 2311fc8ad86SMarek Szyprowski int nr_regs; 2321fc8ad86SMarek Szyprowski u32 value; 2331fc8ad86SMarek Szyprowski atomic_t *refcnt; 2341fc8ad86SMarek Szyprowski struct samsung_retention_ctrl *(*init)(struct samsung_pinctrl_drv_data *, 2351fc8ad86SMarek Szyprowski const struct samsung_retention_data *); 2361fc8ad86SMarek Szyprowski }; 2371fc8ad86SMarek Szyprowski 2381fc8ad86SMarek Szyprowski /** 239ebe629a3SSachin Kamat * struct samsung_pin_ctrl: represent a pin controller. 240ebe629a3SSachin Kamat * @pin_banks: list of pin banks included in this controller. 241ebe629a3SSachin Kamat * @nr_banks: number of pin banks. 2428b1bd11cSChanwoo Choi * @nr_ext_resources: number of the extra base address for pin banks. 2431fc8ad86SMarek Szyprowski * @retention_data: configuration data for retention control. 244ebe629a3SSachin Kamat * @eint_gpio_init: platform specific callback to setup the external gpio 245ebe629a3SSachin Kamat * interrupts for the controller. 246ebe629a3SSachin Kamat * @eint_wkup_init: platform specific callback to setup the external wakeup 247ebe629a3SSachin Kamat * interrupts for the controller. 24800d6fff3SKrzysztof Kozlowski * @suspend: platform specific suspend callback, executed during pin controller 24900d6fff3SKrzysztof Kozlowski * device suspend, see samsung_pinctrl_suspend() 25000d6fff3SKrzysztof Kozlowski * @resume: platform specific resume callback, executed during pin controller 25100d6fff3SKrzysztof Kozlowski * device suspend, see samsung_pinctrl_resume() 252a8be2af0SKrzysztof Kozlowski * 253a8be2af0SKrzysztof Kozlowski * External wakeup interrupts must define at least eint_wkup_init, 254a8be2af0SKrzysztof Kozlowski * retention_data and suspend in order for proper suspend/resume to work. 255ebe629a3SSachin Kamat */ 256ebe629a3SSachin Kamat struct samsung_pin_ctrl { 2578100cf47STomasz Figa const struct samsung_pin_bank_data *pin_banks; 25812cdd579SKrzysztof Kozlowski unsigned int nr_banks; 25952d0ed00SKrzysztof Kozlowski unsigned int nr_ext_resources; 2601fc8ad86SMarek Szyprowski const struct samsung_retention_data *retention_data; 261ebe629a3SSachin Kamat 262ebe629a3SSachin Kamat int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *); 263ebe629a3SSachin Kamat int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *); 264ebe629a3SSachin Kamat void (*suspend)(struct samsung_pinctrl_drv_data *); 265ebe629a3SSachin Kamat void (*resume)(struct samsung_pinctrl_drv_data *); 266ebe629a3SSachin Kamat }; 267ebe629a3SSachin Kamat 268ebe629a3SSachin Kamat /** 269ebe629a3SSachin Kamat * struct samsung_pinctrl_drv_data: wrapper for holding driver data together. 270ebe629a3SSachin Kamat * @node: global list node 271cee7413dSKrzysztof Kozlowski * @virt_base: register base address of the controller; this will be equal 272cee7413dSKrzysztof Kozlowski * to each bank samsung_pin_bank->pctl_base and used on legacy 273cee7413dSKrzysztof Kozlowski * platforms (like S3C24XX or S3C64XX) which has to access the base 274cee7413dSKrzysztof Kozlowski * through samsung_pinctrl_drv_data, not samsung_pin_bank). 275ebe629a3SSachin Kamat * @dev: device instance representing the controller. 276ebe629a3SSachin Kamat * @irq: interrpt number used by the controller to notify gpio interrupts. 277*f9c74474SAndré Draszik * @pclk: optional bus clock if required for accessing registers 278ebe629a3SSachin Kamat * @ctrl: pin controller instance managed by the driver. 279ebe629a3SSachin Kamat * @pctl: pin controller descriptor registered with the pinctrl subsystem. 280ebe629a3SSachin Kamat * @pctl_dev: cookie representing pinctrl device instance. 281ebe629a3SSachin Kamat * @pin_groups: list of pin groups available to the driver. 282ebe629a3SSachin Kamat * @nr_groups: number of such pin groups. 283ebe629a3SSachin Kamat * @pmx_functions: list of pin functions available to the driver. 284ebe629a3SSachin Kamat * @nr_function: number of such pin functions. 2851bf00d7aSTomasz Figa * @nr_pins: number of pins supported by the controller. 2861fc8ad86SMarek Szyprowski * @retention_ctrl: retention control runtime data. 28700d6fff3SKrzysztof Kozlowski * @suspend: platform specific suspend callback, executed during pin controller 28800d6fff3SKrzysztof Kozlowski * device suspend, see samsung_pinctrl_suspend() 28900d6fff3SKrzysztof Kozlowski * @resume: platform specific resume callback, executed during pin controller 29000d6fff3SKrzysztof Kozlowski * device suspend, see samsung_pinctrl_resume() 291ebe629a3SSachin Kamat */ 292ebe629a3SSachin Kamat struct samsung_pinctrl_drv_data { 293ebe629a3SSachin Kamat struct list_head node; 294cee7413dSKrzysztof Kozlowski void __iomem *virt_base; 295ebe629a3SSachin Kamat struct device *dev; 296ebe629a3SSachin Kamat int irq; 297*f9c74474SAndré Draszik struct clk *pclk; 298ebe629a3SSachin Kamat 299ebe629a3SSachin Kamat struct pinctrl_desc pctl; 300ebe629a3SSachin Kamat struct pinctrl_dev *pctl_dev; 301ebe629a3SSachin Kamat 302ebe629a3SSachin Kamat const struct samsung_pin_group *pin_groups; 303ebe629a3SSachin Kamat unsigned int nr_groups; 304ebe629a3SSachin Kamat const struct samsung_pmx_func *pmx_functions; 305ebe629a3SSachin Kamat unsigned int nr_functions; 3061bf00d7aSTomasz Figa 3071bf00d7aSTomasz Figa struct samsung_pin_bank *pin_banks; 30812cdd579SKrzysztof Kozlowski unsigned int nr_banks; 3091bf00d7aSTomasz Figa unsigned int nr_pins; 3101bf00d7aSTomasz Figa 3111fc8ad86SMarek Szyprowski struct samsung_retention_ctrl *retention_ctrl; 3121fc8ad86SMarek Szyprowski 3131bf00d7aSTomasz Figa void (*suspend)(struct samsung_pinctrl_drv_data *); 3141bf00d7aSTomasz Figa void (*resume)(struct samsung_pinctrl_drv_data *); 315ebe629a3SSachin Kamat }; 316ebe629a3SSachin Kamat 317ebe629a3SSachin Kamat /** 31893b0beaeSKrzysztof Kozlowski * struct samsung_pinctrl_of_match_data: OF match device specific configuration data. 31993b0beaeSKrzysztof Kozlowski * @ctrl: array of pin controller data. 32093b0beaeSKrzysztof Kozlowski * @num_ctrl: size of array @ctrl. 32193b0beaeSKrzysztof Kozlowski */ 32293b0beaeSKrzysztof Kozlowski struct samsung_pinctrl_of_match_data { 32393b0beaeSKrzysztof Kozlowski const struct samsung_pin_ctrl *ctrl; 32493b0beaeSKrzysztof Kozlowski unsigned int num_ctrl; 32593b0beaeSKrzysztof Kozlowski }; 32693b0beaeSKrzysztof Kozlowski 32793b0beaeSKrzysztof Kozlowski /** 328ebe629a3SSachin Kamat * struct samsung_pin_group: represent group of pins of a pinmux function. 329ebe629a3SSachin Kamat * @name: name of the pin group, used to lookup the group. 330ebe629a3SSachin Kamat * @pins: the pins included in this group. 331ebe629a3SSachin Kamat * @num_pins: number of pins included in this group. 332ebe629a3SSachin Kamat * @func: the function number to be programmed when selected. 333ebe629a3SSachin Kamat */ 334ebe629a3SSachin Kamat struct samsung_pin_group { 335ebe629a3SSachin Kamat const char *name; 336ebe629a3SSachin Kamat const unsigned int *pins; 337ebe629a3SSachin Kamat u8 num_pins; 338ebe629a3SSachin Kamat u8 func; 339ebe629a3SSachin Kamat }; 340ebe629a3SSachin Kamat 341ebe629a3SSachin Kamat /** 342ebe629a3SSachin Kamat * struct samsung_pmx_func: represent a pin function. 343ebe629a3SSachin Kamat * @name: name of the pin function, used to lookup the function. 344ebe629a3SSachin Kamat * @groups: one or more names of pin groups that provide this function. 345ebe629a3SSachin Kamat * @num_groups: number of groups included in @groups. 346ebe629a3SSachin Kamat */ 347ebe629a3SSachin Kamat struct samsung_pmx_func { 348ebe629a3SSachin Kamat const char *name; 349ebe629a3SSachin Kamat const char **groups; 350ebe629a3SSachin Kamat u8 num_groups; 351ebe629a3SSachin Kamat u32 val; 352ebe629a3SSachin Kamat }; 353ebe629a3SSachin Kamat 354ebe629a3SSachin Kamat /* list of all exported SoC specific data */ 35593b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos3250_of_data; 35693b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos4210_of_data; 35793b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos4x12_of_data; 35893b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos5250_of_data; 35993b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos5260_of_data; 36093b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos5410_of_data; 36193b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos5420_of_data; 36293b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos5433_of_data; 36393b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data exynos7_of_data; 364b0ef7b1aSDavid Virag extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; 365cdd3d945SSam Protsenko extern const struct samsung_pinctrl_of_match_data exynos850_of_data; 36602725b0cSChanho Park extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; 3676cf96df7SJaewon Kim extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data; 3680d1b662cSAlim Akhtar extern const struct samsung_pinctrl_of_match_data fsd_of_data; 3694a8be01aSPeter Griffin extern const struct samsung_pinctrl_of_match_data gs101_of_data; 37093b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data; 37193b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data s3c2412_of_data; 37293b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data s3c2416_of_data; 37393b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data s3c2440_of_data; 37493b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data s3c2450_of_data; 37593b0beaeSKrzysztof Kozlowski extern const struct samsung_pinctrl_of_match_data s5pv210_of_data; 376ebe629a3SSachin Kamat 377ebe629a3SSachin Kamat #endif /* __PINCTRL_SAMSUNG_H */ 378