1*ea89fdf2SPeter Griffin /* SPDX-License-Identifier: GPL-2.0 */ 2*ea89fdf2SPeter Griffin /* 3*ea89fdf2SPeter Griffin * Pinctrl binding constants for GS101 4*ea89fdf2SPeter Griffin * 5*ea89fdf2SPeter Griffin * Copyright 2020-2023 Google LLC 6*ea89fdf2SPeter Griffin */ 7*ea89fdf2SPeter Griffin 8*ea89fdf2SPeter Griffin #ifndef __DTS_ARM64_SAMSUNG_EXYNOS_GOOGLE_PINCTRL_GS101_H__ 9*ea89fdf2SPeter Griffin #define __DTS_ARM64_SAMSUNG_EXYNOS_GOOGLE_PINCTRL_GS101_H__ 10*ea89fdf2SPeter Griffin 11*ea89fdf2SPeter Griffin #define GS101_PIN_PULL_NONE 0 12*ea89fdf2SPeter Griffin #define GS101_PIN_PULL_DOWN 1 13*ea89fdf2SPeter Griffin #define GS101_PIN_PULL_UP 3 14*ea89fdf2SPeter Griffin 15*ea89fdf2SPeter Griffin /* Pin function in power down mode */ 16*ea89fdf2SPeter Griffin #define GS101_PIN_PDN_OUT0 0 17*ea89fdf2SPeter Griffin #define GS101_PIN_PDN_OUT1 1 18*ea89fdf2SPeter Griffin #define GS101_PIN_PDN_INPUT 2 19*ea89fdf2SPeter Griffin #define GS101_PIN_PDN_PREV 3 20*ea89fdf2SPeter Griffin 21*ea89fdf2SPeter Griffin /* GS101 drive strengths */ 22*ea89fdf2SPeter Griffin #define GS101_PIN_DRV_2_5_MA 0 23*ea89fdf2SPeter Griffin #define GS101_PIN_DRV_5_MA 1 24*ea89fdf2SPeter Griffin #define GS101_PIN_DRV_7_5_MA 2 25*ea89fdf2SPeter Griffin #define GS101_PIN_DRV_10_MA 3 26*ea89fdf2SPeter Griffin 27*ea89fdf2SPeter Griffin #define GS101_PIN_FUNC_INPUT 0 28*ea89fdf2SPeter Griffin #define GS101_PIN_FUNC_OUTPUT 1 29*ea89fdf2SPeter Griffin #define GS101_PIN_FUNC_2 2 30*ea89fdf2SPeter Griffin #define GS101_PIN_FUNC_3 3 31*ea89fdf2SPeter Griffin #define GS101_PIN_FUNC_EINT 0xf 32*ea89fdf2SPeter Griffin 33*ea89fdf2SPeter Griffin #endif /* __DTS_ARM64_SAMSUNG_EXYNOS_GOOGLE_PINCTRL_GS101_H__ */ 34