| /linux/drivers/gpio/ |
| H A D | gpio-xlp.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2003-2015 Broadcom Corporation
7 #include <linux/gpio/driver.h>
16 * XLP GPIO has multiple 32 bit registers for each feature where each register
17 * controls 32 pins. So, pins up to 64 require 2 32-bit registers and up to 96
18 * require 3 32-bit registers for each feature.
23 * offset = (gpio / XLP_GPIO_REGSZ) * 4;
26 * where addr is base address of the that feature register and gpio is the pin.
68 static int xlp_gpio_get_reg(void __iomem *addr, unsigned gpio) in xlp_gpio_get_reg() argument
72 pos = gpio % XLP_GPIO_REGSZ; in xlp_gpio_get_reg()
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| /linux/Documentation/devicetree/bindings/hwmon/ |
| H A D | adi,ltc2947.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/LTC2947.pdf
20 - adi,ltc2947
33 adi,accumulator-ctl-pol:
41 $ref: /schemas/types.yaml#/definitions/uint32-array
48 adi,accumulation-deadband-microamp:
55 adi,gpio-out-pol:
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| /linux/drivers/mfd/ |
| H A D | wm8350-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8350-core.c -- Device access for Wolfson WM8350
15 #include <linux/mfd/wm8350/gpio.h>
18 static int gpio_set_dir(struct wm8350 *wm8350, int gpio, int dir) in gpio_set_dir() argument
26 1 << gpio); in gpio_set_dir()
30 1 << gpio); in gpio_set_dir()
35 static int wm8350_gpio_set_debounce(struct wm8350 *wm8350, int gpio, int db) in wm8350_gpio_set_debounce() argument
39 1 << gpio); in wm8350_gpio_set_debounce()
42 WM8350_GPIO_DEBOUNCE, 1 << gpio); in wm8350_gpio_set_debounce()
45 static int gpio_set_func(struct wm8350 *wm8350, int gpio, int func) in gpio_set_func() argument
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| H A D | arizona-spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * arizona-spi.c -- Arizona SPI bus interface
12 #include <linux/gpio/consumer.h>
13 #include <linux/gpio/machine.h>
21 #include <uapi/linux/input-event-codes.h>
32 { "reset-gpios", &reset_gpios, 1, },
33 { "wlf,ldoena-gpios", &ldoena_gpios, 1 },
38 * The ACPI resources for the device only describe external GPIO-s. They do
39 * not provide mappings for the GPIO-s coming from the Arizona codec itself.
42 { "arizona", 2, "wlf,spkvdd-ena", 0, GPIO_ACTIVE_HIGH },
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| /linux/drivers/input/touchscreen/ |
| H A D | wm97xx-core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm97xx-core.c -- Touch screen driver core for Wolfson WM9705, WM9712
15 * - supports WM9705, WM9712, WM9713
16 * - polling mode
17 * - continuous mode (arch-dependent)
18 * - adjustable rpu/dpp settings
19 * - adjustable pressure current
20 * - adjustable sample settle delay
21 * - 4 and 5 wire touchscreens (5 wire is WM9712 only)
22 * - pen down detection
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| /linux/drivers/ssb/ |
| H A D | driver_gpio.c | 3 * GPIO driver
6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
13 #include <linux/gpio/driver.h>
26 static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio) in ssb_gpio_to_irq() argument
30 if (bus->bustype == SSB_BUSTYPE_SSB) in ssb_gpio_to_irq()
31 return irq_find_mapping(bus->irq_domain, gpio); in ssb_gpio_to_irq()
33 return -EINVAL; in ssb_gpio_to_irq()
41 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio) in ssb_gpio_chipco_get_value() argument
45 return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio); in ssb_gpio_chipco_get_value()
48 static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio, in ssb_gpio_chipco_set_value() argument
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| /linux/Documentation/devicetree/bindings/extcon/ |
| H A D | wlf,arizona.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
20 wlf,hpdet-channel:
30 wlf,use-jd2:
35 wlf,use-jd2-nopull:
40 wlf,jd-invert:
45 wlf,micd-software-compare:
50 wlf,micd-detect-debounce:
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| /linux/drivers/bcma/ |
| H A D | driver_gpio.c | 3 * GPIO driver
6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
11 #include <linux/gpio/driver.h>
22 static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio) in bcma_gpio_get_value() argument
26 return !!bcma_chipco_gpio_in(cc, 1 << gpio); in bcma_gpio_get_value()
29 static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio, in bcma_gpio_set_value() argument
34 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); in bcma_gpio_set_value()
37 static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) in bcma_gpio_direction_input() argument
41 bcma_chipco_gpio_outen(cc, 1 << gpio, 0); in bcma_gpio_direction_input()
45 static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, in bcma_gpio_direction_output() argument
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | cs35l36.txt | 5 - compatible : "cirrus,cs35l36"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
13 - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost
18 - cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA.
24 - cirrus,boost-ind-nanohenry : Inductor estimation LBST reference value.
32 - cirrus,multi-amp-mode : Boolean to determine if there are more than
33 one amplifier in the system. If more than one it is best to Hi-Z the ASP
36 - cirrus,boost-ctl-select : Boost converter control source selection.
39 0x00 - Control Port Value
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| H A D | cirrus,cs35l45.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
11 - Richard Fitzgerald <rf@opensource.cirrus.com>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
31 '#sound-dai-cells':
34 reset-gpios:
37 vdd-a-supply:
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| /linux/include/dt-bindings/sound/ |
| H A D | cs35l45.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
12 * cirrus,asp-sdout-hiz-ctrl
14 * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.
15 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
21 * Optional GPIOX Sub-nodes:
22 * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
23 * sub-nodes for configuring the GPIO pins.
25 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
30 * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.
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| /linux/drivers/hwmon/ |
| H A D | ltc2947-core.c | 1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/hwmon-sysfs.h>
66 #define VOLTAGE_MIN -300
77 #define CURRENT_MIN -30000
86 #define POWER_MIN -450000000
98 #define TEMP_MIN -40000
108 #define LTC2947_ALERTS_SIZE (LTC2947_REG_STATVDVCC - LTC2947_REG_STATUS)
126 * complete sequence select_page->read/write needs to be protected.
139 ret = regmap_bulk_read(st->map, reg, &__val, 2); in __ltc2947_val_read16()
154 ret = regmap_bulk_read(st->map, reg, &__val, 3); in __ltc2947_val_read24()
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | wlf,arizona.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
17 - $ref: /schemas/spi/spi-peripheral-props.yaml
18 - $ref: /schemas/sound/wlf,arizona.yaml#
19 - $ref: /schemas/regulator/wlf,arizona.yaml#
20 - $ref: /schemas/extcon/wlf,arizona.yaml#
21 - if:
26 - cirrus,cs47l24
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| /linux/Documentation/devicetree/bindings/leds/ |
| H A D | leds-bcm6358.txt | 5 which can either be controlled by software (exporting the 74x164 as spi-gpio.
6 See Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml), or
10 - compatible : should be "brcm,bcm6358-leds".
11 - #address-cells : must be 1.
12 - #size-cells : must be 0.
13 - reg : BCM6358 LED controller address and size.
16 - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.
18 - brcm,clk-dat-low : Boolean, makes clock and data signals active low.
21 Each LED is represented as a sub-node of the brcm,bcm6358-leds device.
23 LED sub-node required properties:
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| /linux/include/linux/mfd/wm8350/ |
| H A D | gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * gpio.h -- GPIO Driver for Wolfson WM8350 PMIC
14 * GPIO Registers.
30 * GPIO Functions
172 * R30 (0x1E) - GPIO Interrupt Status
190 * R128 (0x80) - GPIO Debounce
207 * R129 (0x81) - GPIO Pin pull up Control
224 * R130 (0x82) - GPIO Pull down Control
241 * R131 (0x83) - GPIO Interrupt Mode
258 * R133 (0x85) - GPIO Control
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| /linux/include/linux/ |
| H A D | wm97xx.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
62 #define WM97XX_SLT(i) ((i - 5) & 0x7) /* panel slot (5-11) */
71 #define WM9712_45W 0x1000 /* set for 5-wire touchscreen */
124 /* Codec GPIO's */
146 /*---------------- Return codes from sample reading functions ---------------*/
160 * The wm97xx driver provides a private API for writing platform-specific
172 * Codec GPIO status
180 * Codec GPIO direction
188 * Codec GPIO polarity
196 * Codec GPIO sticky
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| /linux/drivers/gpu/drm/bridge/ |
| H A D | lontium-lt9611.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2019-2020. Linaro Limited.
7 #include <linux/gpio/consumer.h>
10 #include <linux/media-bus-format.h>
17 #include <sound/hdmi-codec.h>
104 { 0x811c, 0x03 }, /* PortA clk lane no-LP mode */ in lt9611_mipi_input_analog()
105 { 0x8120, 0x03 }, /* PortB clk lane with-LP mode */ in lt9611_mipi_input_analog()
108 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_analog()
123 if (lt9611->dsi1_node) in lt9611_mipi_input_digital()
126 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_digital()
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| H A D | chipone-icn6211.c | 1 // SPDX-License-Identifier: GPL-2.0+
16 #include <linux/gpio/consumer.h>
18 #include <linux/media-bus-format.h>
214 return ret == val_size ? 0 : -EINVAL; in chipone_dsi_read()
240 ret = regmap_read(icn->regmap, reg, &pval); in chipone_readb()
247 return regmap_write(icn->regmap, reg, val); in chipone_writeb()
254 unsigned int mode_clock = mode->clock * 1000; in chipone_configure_pll()
271 * P is pre-divider, register PLL_REF_DIV[3:0] is 1:n divider in chipone_configure_pll()
274 * S is post-divider, register PLL_REF_DIV[7:5] is 2^(n+1) divider in chipone_configure_pll()
276 * It seems the PLL input clock after applying P pre-divider have in chipone_configure_pll()
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| /linux/drivers/gpu/drm/gma500/ |
| H A D | intel_bios.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
124 /* pre-915 */
125 #define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */
126 #define GPIO_PIN_ADD_I2C 0x05 /* "ADDCARD I2C GPIO pins" */
127 #define GPIO_PIN_ADD_DDC 0x04 /* "ADDCARD DDC GPIO pins" */
128 #define GPIO_PIN_ADD_DDC_I2C 0x06 /* "ADDCARD DDC/I2C GPIO pins" */
206 /* DDC GPIO */
227 * number = (block_size - sizeof(bdb_general_definitions))/
249 u8 pol:1; member
250 u8 gpio:3; member
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/pinctrl/pinconf-generic.h>
14 #include "mtk-eint.h"
61 #define SET_ADDR(x, y) (x + (y->devdata->port_align))
62 #define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1))
71 * struct mtk_drv_group_desc - Provide driving group data.
96 * struct mtk_pin_drv_grp - Provide each pin driving info.
119 * - For special pins' pull up/down setting which resides in same register
144 * struct mtk_pin_ies_set - For special pins' ies and smt setting.
178 unsigned int pol; member
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| H A D | mtk-eint.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2014-2018 MediaTek Inc.
14 #include <linux/gpio/driver.h>
22 #include "mtk-eint.h"
43 .pol = 0x300,
74 if (eint_num >= eint->hw->ap_num) in mtk_eint_get_offset()
75 eint_base = eint->hw->ap_num; in mtk_eint_get_offset()
77 reg = eint->base + offset + ((eint_num - eint_base) / 32) * 4; in mtk_eint_get_offset()
88 eint->regs->sens); in mtk_eint_can_en_debounce()
95 if (eint_num < eint->hw->db_cnt && sens != MTK_EINT_EDGE_SENSITIVE) in mtk_eint_can_en_debounce()
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| /linux/arch/arm/mach-s3c/ |
| H A D | mach-crag6410-module.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Speyside modules for Cragganmore - board data probing
12 #include <linux/gpio/machine.h>
15 #include <linux/mfd/wm831x/gpio.h>
28 #include <linux/platform_data/spi-s3c64xx.h>
74 .dev_id = "1-001a", /* Device 001a on I2C bus 1 */
79 "hp-pol", GPIO_ACTIVE_HIGH),
131 .dev_id = "1-001a", /* Device 001a on I2C bus 1 */
229 .dev_id = "i2c-wm8958", /* I2C device name */
329 .dev_id = "1-003a", /* Device 003a on I2C bus 1 */
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| /linux/drivers/gpu/drm/bridge/analogix/ |
| H A D | analogix_dp_core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/gpio/consumer.h>
72 * "force-hpd" would indicate whether driver need this. in analogix_dp_detect_hpd()
74 if (!dp->force_hpd) in analogix_dp_detect_hpd()
75 return -ETIMEDOUT; in analogix_dp_detect_hpd()
82 dev_dbg(dp->dev, "failed to get hpd plug status, try to force hpd\n"); in analogix_dp_detect_hpd()
87 dev_err(dp->dev, "failed to get hpd plug in status\n"); in analogix_dp_detect_hpd()
88 return -EINVAL; in analogix_dp_detect_hpd()
91 dev_dbg(dp->dev, "success to get plug in status after force hpd\n"); in analogix_dp_detect_hpd()
101 ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version); in analogix_dp_detect_sink_psr()
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| /linux/arch/mips/alchemy/devboards/ |
| H A D | db1550.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
10 #include <linux/gpio.h>
22 #include <asm/mach-au1x00/au1000.h>
23 #include <asm/mach-au1x00/gpio-au1000.h>
24 #include <asm/mach-au1x00/au1xxx_eth.h>
25 #include <asm/mach-au1x00/au1xxx_dbdma.h>
26 #include <asm/mach-au1x00/au1xxx_psc.h>
27 #include <asm/mach-au1x00/au1550_spi.h>
28 #include <asm/mach-au1x00/au1550nd.h>
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| /linux/drivers/media/pci/cx88/ |
| H A D | cx88-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * cx88x-hw.h - CX2388x register offsets
5 * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
92 // DMA Channels 1-6 belong to SPIPE
96 // DMA Channels 9-20 belong to SPIPE
475 #define MO_GP3_IO 0x35001C // {32}RW* GPIO Mode/Ctrloutput enables
476 #define MO_GPIO 0x350020 // {32}RW* GPIO I2C Ctrldata I/O
477 #define MO_GPOE 0x350024 // {32}RW GPIO I2C Ctrloutput enables
478 #define MO_GP_ISM 0x350028 // {16}WO GPIO Intr Sens/Pol
482 #define MO_M2M_XSUM 0x35C028 // {32}RO M2M XOR-Checksum
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