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/linux/Documentation/virt/kvm/
H A Dhalt-polling.rst1 .. SPDX-License-Identifier: GPL-2.0
4 The KVM halt polling system
7 The KVM halt polling system provides a feature within KVM whereby the latency
16 the order of a few micro-seconds, although performance benefits are workload
19 invoked. Thus halt polling is especially useful on workloads with very short
20 wakeup periods where the time spent halt polling is minimised and the time
23 The generic halt polling code is implemented in:
27 The powerpc kvm-hv specific case is implemented in:
31 Halt Polling Interval
35 as the halt polling interval, is increased and decreased based on the perceived
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/linux/Documentation/devicetree/bindings/input/
H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
32 Specifies the GPIO connected to the device's active-low RDY output.
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H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
17 additional Hall-effect and inductive sensing capabilities.
24 - azoteq,iqs269a
25 - azoteq,iqs269a-00
26 - azoteq,iqs269a-d0
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/linux/arch/alpha/kernel/
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 * switched into OSF/1 PAL-code, and loaded us at the correct address
8 * the kernel global pointer and jump to the kernel entry-point.
12 #include <asm/asm-offsets.h>
29 lda $30,0x4000 - SIZEOF_PT_REGS($8)
39 /* On entry here from SRM console, the HWPCB of the per-cpu
88 # It is handy, on occasion, to make halt actually just loop.
94 .globl halt
95 .ent halt
96 halt: label
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/linux/Documentation/devicetree/bindings/bus/
H A Dqcom,ssc-block-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs
10 - Michael Srba <Michael.Srba@seznam.cz>
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
32 - description: SSCAON_CONFIG0 registers
33 - description: SSCAON_CONFIG1 registers
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/linux/Documentation/virt/
H A Dguest-halt-polling.rst2 Guest halt polling
15 2) The VM-exit cost can be avoided.
20 The basic logic as follows: A global value, guest_halt_poll_ns,
25 ("per-cpu guest_halt_poll_ns"), which is adjusted by the algorithm
42 Division factor used to shrink per-cpu guest_halt_poll_ns when
43 wakeup event occurs after the global guest_halt_poll_ns.
49 Multiplication factor used to grow per-cpu guest_halt_poll_ns
50 when event occurs after per-cpu guest_halt_poll_ns
51 but before global guest_halt_poll_ns.
57 The per-cpu guest_halt_poll_ns eventually reaches zero
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/linux/arch/powerpc/platforms/cell/spufs/
H A Dspu_restore_crt0.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * crt0_r.S: Entry function for SPU-side context restore.
7 * Entry and exit function for SPU-side of the context restore
22 .global _start
25 * (16kb-16). The back chain pointer is initialized
36 stqd $SP, -160($SP)
37 ai $SP, $SP, -160
42 .global exit
43 .global _exit
53 restore_reg_insts: /* must be quad-word aligned. */
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/linux/arch/arm/mach-rockchip/
H A Dsleep.S1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Author: Tony Xie <tony.xie@rock-chips.com>
24 /* olny cpu0 can continue to run, the others is halt here */
44 .global rkpm_bootdata_l2ctlr_f
49 .global rkpm_bootdata_l2ctlr
64 .word . - rockchip_slp_cpu_resume
/linux/arch/arc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
90 source "arch/arc/plat-tb10x/Kconfig"
91 source "arch/arc/plat-axs10x/Kconfig"
92 source "arch/arc/plat-hsdk/Kconfig"
110 ISA for the Next Generation ARC-HS cores
128 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
130 -Caches: New Prog Model, Region Flush
131 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
134 bool "ARC-HS"
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/linux/arch/mips/include/asm/mach-cavium-octeon/
H A Dkernel-entry-init.h6 * Copyright (C) 2005-2008 Cavium Networks, Inc
48 xor t1, t1, 0x9000 # 63-P1
51 xor t1, t1, 0x9008 # 63-P2
54 xor t1, t1, 0x9100 # 68-P1
57 xor t1, t1, 0x9200 # 66-PX
60 slti t1, t1, 2 # 66-P1.2 and later good.
63 4: # core-16057 work around
66 5: # No core-16057 work around
77 sd $0, -32768(v0)
121 # Get my GP from the global variable
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/linux/arch/powerpc/sysdev/
H A Dfsl_soc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 static phys_addr_t immrbase = -1;
43 if (immrbase != -1) in get_immrbase()
63 static u32 sysfreq = -1; in fsl_get_sys_freq()
66 if (sysfreq != -1) in fsl_get_sys_freq()
71 return -1; in fsl_get_sys_freq()
73 of_property_read_u32(soc, "clock-frequency", &sysfreq); in fsl_get_sys_freq()
74 if (sysfreq == -1 || !sysfreq) in fsl_get_sys_freq()
75 of_property_read_u32(soc, "bus-frequency", &sysfreq); in fsl_get_sys_freq()
86 static u32 brgfreq = -1; in get_brgfreq()
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/linux/drivers/gpu/drm/panthor/
H A Dpanthor_fw.c1 // SPDX-License-Identifier: GPL-2.0 or MIT
9 #include <linux/dma-mapping.h>
12 #include <linux/iosys-map.h>
36 * struct panthor_fw_binary_hdr - Firmware binary header.
64 * enum panthor_fw_binary_entry_type - Firmware binary entry type
67 /** @CSF_FW_BINARY_ENTRY_TYPE_IFACE: Host <-> FW interface. */
73 /** @CSF_FW_BINARY_ENTRY_TYPE_FUTF_TEST: Unit-tests. */
116 * struct panthor_fw_binary_section_entry_hdr - Describes a section of FW binary
149 * struct panthor_fw_binary_iter - Firmware binary iterator
165 * struct panthor_fw_section - FW section
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/linux/tools/testing/selftests/kvm/x86_64/
H A Dxapic_ipi_test.c1 // SPDX-License-Identifier: GPL-2.0
19 * Migration is a command line option. When used on non-numa machines will
20 * exit with error. Test is still usefull on non-numa for testing IPIs.
67 * Record local version register as a cross-check that APIC access
78 uint64_t *pipis_rcvd; /* host address of ipis_rcvd global */
94 data->halter_apic_id = GET_APIC_ID_FIELD(xapic_read_reg(APIC_ID)); in halter_guest_code()
95 data->halter_lvr = xapic_read_reg(APIC_LVR); in halter_guest_code()
100 * halt to the sender vCPU and executing the halt. No need to disable on in halter_guest_code()
102 * signal going into first halt before starting the sender vCPU. Record in halter_guest_code()
106 data->halter_tpr = xapic_read_reg(APIC_TASKPRI); in halter_guest_code()
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/linux/include/linux/fsl/
H A Dguts.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Freecale 85xx and 86xx Global Utilties register set
18 * Global Utility Registers.
29 u32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
30 u32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
31 u32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and
34 u32 pordevsr; /* 0x.000c - POR I/O Device Status Register */
35 u32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */
36 u32 pordevsr2; /* 0x.0014 - POR device status register 2 */
37 u8 res018[0x20 - 0x18];
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/linux/arch/arc/kernel/
H A Dentry-arcv2.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling
58 .rept NR_CPU_IRQS - 8
65 flag 1 ; Unexpected event, halt
74 # global interrupt enable bits in STATUS32 (.IE for 1 prio, .E[] for 2 prio)
81 # Note this disable is only for consistent book-keeping as further interrupts
84 # unless this one returns (or higher prio becomes pending in 2-prio scheme)
118 ; ---------------------------------------------
120 ; - Unlike ARCompact, handles Bus errors for both User/Kernel mode,
122 ; ---------------------------------------------
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/linux/arch/um/drivers/
H A Dmconsole_user.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2001 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
17 * With uts namespaces, uts information becomes process-specific, so
23 { "halt", mconsole_halt, MCONSOLE_PROC },
48 msg.msg_name = &(req->origin); in mconsole_reply_v0()
49 msg.msg_namelen = req->originlen; in mconsole_reply_v0()
56 return sendmsg(req->originating_fd, &msg, 0); in mconsole_reply_v0()
66 if (!strncmp(req->request.data, cmd->command, in mconsole_parse()
67 strlen(cmd->command))) { in mconsole_parse()
85 req->originlen = sizeof(req->origin); in mconsole_get_request()
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/linux/arch/mips/kernel/
H A Dcps-vec.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 #include <asm/asm-offsets.h>
17 #include <asm/smp-cps.h>
51 * Set dest to non-zero if the core supports the MT ASE, else zero. If
66 * Set dest to non-zero if the core supports MIPSr6 multithreading
131 /* Skip core-level init if we started up coherent */
135 /* Perform any further required core-level initialisation */
236 /* Set exclusive TC, non-active, master */
242 /* Set TC non-active, non-allocatable */
267 * mips_cps_get_bootcfg() - retrieve boot configuration pointers
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/linux/drivers/infiniband/hw/hfi1/
H A Dpio.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright(c) 2015-2018 Intel Corporation.
32 /* global control of PIO send */
38 int flush = 0; /* re-read sendctrl to make sure it is flushed */ in pio_send_control()
41 spin_lock_irqsave(&dd->sendctrl_lock, flags); in pio_send_control()
50 for (i = 0; i < ARRAY_SIZE(dd->vld); i++) in pio_send_control()
51 if (!dd->vld[i].mtu) in pio_send_control()
86 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in pio_send_control()
93 #define SCS_POOL_0 -1
94 #define SCS_POOL_1 -2
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/linux/drivers/net/ipa/
H A Dgsi.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2024 Linaro Ltd.
29 * providing a well-defined communication layer between the AP subsystem
32 * -------- ---------
34 * | AP +<---. .----+ Modem |
35 * | +--. | | .->+ |
37 * -------- | | | | ---------
39 * --+-+---+-+--
41 * |-----------|
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/linux/arch/sparc/include/asm/
H A Doplib_64.h1 /* SPDX-License-Identifier: GPL-2.0 */
85 /* Enter the prom, with no chance of continuation for the stand-alone
90 /* Halt and power-off the machine. */
166 #define PROM_MAP_READ 0x0002 /* Readable - sw */
167 #define PROM_MAP_EXEC 0x0004 /* Executable - sw */
170 #define PROM_MAP_SE 0x0040 /* Side-Effects */
171 #define PROM_MAP_GLOB 0x0080 /* Global */
172 #define PROM_MAP_IE 0x0100 /* Invert-Endianness */
191 * Returns -1 on error (ie. no such property at this node).
196 * the number of bytes the prom put into your buffer or -1 on error.
/linux/arch/x86/kernel/
H A Dhead64.c1 // SPDX-License-Identifier: GPL-2.0
78 * 5-level paging is detected and enabled at kernel decompression in check_la57_support()
126 pmd[i] -= sme_get_me_mask(); in sme_postprocess_startup()
138 * doesn't have to generate PC-relative relocations when accessing globals from
140 * boot-time crashes. To work around this problem, every global pointer must
166 load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map); in __startup_64()
178 pgd = &RIP_REL_REF(early_top_pgt)->pgd; in __startup_64()
183 p4d[MAX_PTRS_PER_P4D - 1] += load_delta; in __startup_64()
188 RIP_REL_REF(level3_kernel_pgt)[PTRS_PER_PUD - 2].pud += load_delta; in __startup_64()
189 RIP_REL_REF(level3_kernel_pgt)[PTRS_PER_PUD - 1].pud += load_delta; in __startup_64()
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/linux/Documentation/admin-guide/pm/
H A Dcpuidle.rst1 .. SPDX-License-Identifier: GPL-2.0
27 CPU idle time management is an energy-efficiency feature concerned about using
31 ------------
37 software as individual single-core processors. In other words, a CPU is an
46 Second, if the processor is multi-core, each core in it is able to follow at
61 Finally, each core in a multi-core processor may be able to follow more than one
66 multiple individual single-core "processors", referred to as *hardware threads*
67 (or hyper-threads specifically on Intel hardware), that each can follow one
78 ---------
112 .. _idle-loop:
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/linux/arch/arm/include/asm/
H A Dmcpm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright: (C) 2012-2013 Linaro Limited
40 * branch once it is ready to re-enter the kernel using ptr, or NULL if it
59 * mcpm_is_available - returns whether MCPM is initialized and available
66 * mcpm_cpu_power_up - make given CPU in given cluster runable
87 * mcpm_cpu_power_down - power the calling CPU down
92 * then the cluster is prepared for power-down too.
96 * On success this does not return. Re-entry in the kernel is expected
103 * mcpm_wait_for_cpu_powerdown() subsequently returns non-zero for the
110 * mcpm_wait_for_cpu_powerdown - wait for a specified CPU to halt, and
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/linux/include/linux/
H A Dbtf.h1 /* SPDX-License-Identifier: GPL-2.0 */
42 * bpf_task_acquire(task->last_wakee); // Rejected, walked task
51 * bpf_task_acquire(acquired->last_wakee); // Rejected, walked task
82 * amount of copy-paste that kfunc authors have to include for correctness so
84 * kfunc, or a global kfunc in an LTO build.
90 __diag_ignore_all("-Wmissing-declarations", \
91 "Global kfuncs as their definitions will be in BTF");\
92 __diag_ignore_all("-Wmissing-prototypes", \
93 "Global kfuncs as their definitions will be in BTF")
100 * Return the name of the passed struct, if exists, or halt the build if for
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/linux/drivers/usb/dwc2/
H A Dhcd.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * hcd.c - DesignWare HS OTG Controller host-mode routines
5 * Copyright (C) 2004-2013 Synopsys, Inc.
17 #include <linux/dma-mapping.h>
37 * dwc2_enable_common_interrupts() - Initializes the commmon interrupts,
55 if (!hsotg->params.host_dma) in dwc2_enable_common_interrupts()
57 if (!hsotg->params.external_id_pin_ctl) in dwc2_enable_common_interrupts()
63 if (dwc2_is_device_mode(hsotg) && hsotg->params.lpm) in dwc2_enable_common_interrupts()
73 switch (hsotg->hw_params.arch) { in dwc2_gahbcfg_init()
75 dev_err(hsotg->dev, "External DMA Mode not supported\n"); in dwc2_gahbcfg_init()
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