Lines Matching +full:global +full:- +full:halt
1 .. SPDX-License-Identifier: GPL-2.0
27 CPU idle time management is an energy-efficiency feature concerned about using
31 ------------
37 software as individual single-core processors. In other words, a CPU is an
46 Second, if the processor is multi-core, each core in it is able to follow at
61 Finally, each core in a multi-core processor may be able to follow more than one
66 multiple individual single-core "processors", referred to as *hardware threads*
67 (or hyper-threads specifically on Intel hardware), that each can follow one
78 ---------
112 .. _idle-loop:
127 the platform or the processor architecture and organized in a one-dimensional
134 taken into account by the governor, the *target residency* and the (worst-case)
152 and exit it. However, the CPU may be woken up by a non-timer event at any time
162 There are four ``CPUIdle`` governors available, ``menu``, `TEO <teo-gov_>`_,
165 tick can be `stopped by the idle loop <idle-cpus-and-tick_>`_. Available
186 .. _idle-cpus-and-tick:
223 (non-tick) timer due to trigger within the tick range, stopping the tick clearly
225 reprogrammed in that case. Second, if the governor is expecting a non-timer
247 loop altogether. That can be done through the build-time configuration of it
255 generally regarded as more energy-efficient than the systems running kernels in
261 .. _menu-gov:
319 from the power management quality of service, or `PM QoS <cpu-pm-qos_>`_,
331 if it has not decided to `stop the scheduler tick <idle-cpus-and-tick_>`_. That
340 .. _teo-gov:
347 <menu-gov_>`_: it always tries to find the deepest idle state suitable for the
350 .. kernel-doc:: drivers/cpuidle/governors/teo.c
351 :doc: teo-description
353 .. _idle-states-representation:
359 supported by the processor have to be represented as a one-dimensional array of
365 of it <idle-loop_>`_, must reflect the properties of the idle state at the
512 .. _cpu-pm-qos:
519 energy-efficiency features of the kernel to prevent performance from dropping
523 global CPU latency limit and through the resume latency constraints for
528 signed 32-bit integer) to it. In turn, the resume latency constraint for a CPU
530 32-bit integer) to the :file:`power/pm_qos_resume_latency_us` file under
540 global CPU latency limit and for each individual CPU, aggregates them and
545 PM QoS request to be created and added to a global priority list of CPU latency
563 with that file descriptor to be removed from the global priority list of CPU
582 CPU idle time governors are expected to regard the minimum of the global
593 `disabled for individual CPUs <idle-states-representation_>`_, there are kernel
604 however, so it is rather crude and not very energy-efficient. For this reason,
619 options related to CPU idle time management: ``idle=poll``, ``idle=halt``,
625 ``idle=halt`` case, the architecture support code will use the ``HLT``
633 P-states (see |cpufreq|) that require any number of CPUs in a package to be
634 idle, so it very well may hurt single-thread computations performance as well as
635 energy-efficiency. Thus using it for performance reasons may not be a good idea
646 In addition to the architecture-level kernel command line options affecting CPU
652 `Representation of Idle States <idle-states-representation_>`_), causes the