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/linux/drivers/usb/host/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
11 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
28 module will be called xhci-hcd.
55 tristate "Generic xHCI driver for a platform device"
57 Adds an xHCI host driver for a generic platform device, which
90 tristate "xHCI support for Renesas R-Car SoCs"
96 found in Renesas R-Car ARM SoCs.
128 Enables support for XHCI, EHCI and OHCI host controllers
132 modules will be called ohci-platform.ko, ehci-brcm.ko and
133 xhci-plat-hcd.ko
[all …]
H A Dehci-sh.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH EHCI host controller driver
7 * Based on ohci-sh.c and ehci-atmel.c.
19 struct ehci_hcd *ehci = hcd_to_ehci(hcd); in ehci_sh_reset() local
21 ehci->caps = hcd->regs; in ehci_sh_reset()
28 .product_desc = "SuperH EHCI",
32 * generic hardware linkage
82 return -ENODEV; in ehci_hcd_sh_probe()
91 hcd = usb_create_hcd(&ehci_sh_hc_driver, &pdev->dev, in ehci_hcd_sh_probe()
92 dev_name(&pdev->dev)); in ehci_hcd_sh_probe()
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/linux/Documentation/devicetree/bindings/mfd/
H A Domap-usb-host.txt5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
22 "ohci-phy-6pin-dpdm",
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/linux/arch/mips/boot/dts/brcm/
H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
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H A Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm3384_viper.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
16 #address-cells = <1>;
17 #size-cells = <0>;
20 mips-hpt-frequency = <300000000>;
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
33 interrupt-controller;
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H A Dbcm6362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6362-clock.h"
4 #include "dt-bindings/reset/bcm6362-reset.h"
5 #include "dt-bindings/soc/bcm6362-pm.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <0>;
16 mips-hpt-frequency = <200000000>;
32 periph_osc: periph-osc {
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H A Dbcm6328.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6328-clock.h"
4 #include "dt-bindings/reset/bcm6328-reset.h"
5 #include "dt-bindings/soc/bcm6328-pm.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <0>;
16 mips-hpt-frequency = <160000000>;
32 periph_osc: periph-osc {
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H A Dbcm3384_zephyr.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 mips-hpt-frequency = <100000000>;
35 #address-cells = <0>;
36 compatible = "mti,cpu-interrupt-controller";
38 interrupt-controller;
39 #interrupt-cells = <1>;
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H A Dbcm63268.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm63268-clock.h"
4 #include "dt-bindings/reset/bcm63268-reset.h"
5 #include "dt-bindings/soc/bcm63268-pm.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <0>;
16 mips-hpt-frequency = <200000000>;
32 periph_osc: periph-osc {
[all …]
H A Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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/linux/include/linux/usb/
H A Dehci_pdriver.h1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
13 * struct usb_ehci_pdata - platform_data for generic ehci driver
15 * @caps_offset: offset of the EHCI Capability Registers to the start of
27 * These are general configuration options for the EHCI controller. All of
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-ld4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
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H A Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-sld8";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
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/linux/arch/arm/boot/dts/hpe/
H A Dhpe-gxp.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
21 next-level-cache = <&L2>;
26 pll: clock-0 {
27 compatible = "fixed-clock";
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsunxi-h3-h5.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun6i-rtc.h>
44 #include <dt-bindings/clock/sun8i-de2.h>
45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/clock/sun8i-r-ccu.h>
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/reset/sun8i-de2.h>
49 #include <dt-bindings/reset/sun8i-h3-ccu.h>
50 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 interrupt-parent = <&gic>;
[all …]
/linux/Documentation/devicetree/bindings/
H A Dxilinx.txt10 Each IP-core has a set of parameters which the FPGA designer can use to
20 properties of the device node. In general, device nodes for IP-cores
23 (name): (generic-name)@(base-address) {
24 compatible = "xlnx,(ip-core-name)-(HW_VER)"
27 interrupt-parent = <&interrupt-controller-phandle>;
29 xlnx,(parameter1) = "(string-value)";
30 xlnx,(parameter2) = <(int-value)>;
33 (generic-name): an open firmware-style name that describes the
34 generic class of device. Preferably, this is one word, such
36 (ip-core-name): the name of the ip block (given after the BEGIN
[all …]
/linux/arch/mips/generic/
H A Dboard-sead3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <asm/yamon-dt.h>
61 gic_off = fdt_node_offset_by_compatible(fdt, -1, "mti,gic"); in remove_gic()
73 cpu_off = fdt_node_offset_by_compatible(fdt, -1, in remove_gic()
74 "mti,cpu-interrupt-controller"); in remove_gic()
83 return -EINVAL; in remove_gic()
86 uart_off = fdt_node_offset_by_compatible(fdt, -1, "ns16550a"); in remove_gic()
88 err = fdt_setprop_u32(fdt, uart_off, "interrupt-parent", in remove_gic()
91 pr_warn("unable to set UART interrupt-parent: %d\n", in remove_gic()
107 if (uart_off != -FDT_ERR_NOTFOUND) { in remove_gic()
[all …]
/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "socionext,uniphier-ld11";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm53573.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
21 stdout-path = "serial0:115200n8";
25 #address-cells = <1>;
[all …]
/linux/arch/mips/boot/dts/qca/
H A Dar9132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
22 cpuintc: interrupt-controller {
23 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
25 interrupt-controller;
26 #interrupt-cells = <1>;
[all …]
/linux/drivers/usb/gadget/legacy/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
23 # Gadget drivers are hardware-neutral, or "platform independent",
44 Gadget Zero is a two-configuration device. It either sinks and
47 conformance. The driver needs only two bulk-capable endpoints, so
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