/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | samsung-sxgbe.txt | 4 - compatible: Should be "samsung,sxgbe-v2.0a" 5 - reg: Address and length of the register set for the device 6 - interrupts: Should contain the SXGBE interrupts 7 These interrupts are ordered by fixed and follows variable 9 index 0 - this is fixed common interrupt of SXGBE and it is always 11 index 1 to 25 - 8 variable transmit interrupts, variable 16 receive interrupts 13 - phy-mod [all...] |
H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a 26 - snps,dwmac-3.610 [all …]
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H A D | snps,dwc-qos-ethernet.txt | 13 - compatible: One of: 14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10" 15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC. 16 - "nvidia,tegra186-eqos", "snps,dwc-qo [all...] |
H A D | ibm,emac.txt | 8 correct clock-frequency property. 13 - device_type : "network" 15 - compatible : compatible list, contains 2 entries, first is 16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx, 18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", 20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> 21 - reg : <registers mapping> 22 - local-mac-address : 6 bytes, MAC address 23 - mal-device : phandle of the associated McMAL node 24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated [all …]
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/freebsd/sys/contrib/device-tree/Bindings/dma/stm32/ |
H A D | st,stm32-dma3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 22 described in "#dma-cells" property description below, using a three-cell 26 - Amelie Delaunay <amelie.delaunay@foss.st.com> 29 - $ref: /schemas/dma/dma-controller.yaml# 33 const: st,stm32mp25-dma3 42 Should contain all of the per-channel DMA interrupts in ascending order 51 power-domains: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | intel,ldma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - chuanhua.lei@intel.com 11 - mallikarjunax.reddy@intel.com 14 - $ref: dma-controller.yaml# 19 - intel,lgm-cdma 20 - intel,lgm-dma2tx 21 - intel,lgm-dma1rx 22 - intel,lgm-dma1tx [all …]
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | ar9300_freebsd_inc.h | 59 #define OS_ATOMIC_DEC(a) (*a)-- 99 u_int32_t rp_numpulses ; /* Num of pulses in radar burst */ 101 u_int32_t rp_pulsefreq; /* Frequency of pulses in burst */ 102 u_int32_t rp_max_pulsefreq; /* Frequency of pulses in burst */ 103 u_int32_t rp_patterntype; /* fixed or variable pattern type*/ 105 matched filter (single-sided) in usecs */ 122 u_int32_t rp_numpulses; /* Num of pulses in radar burst */ 124 u_int32_t rp_min_pulsefreq; /* Frequency of pulses in burst */ 125 u_int32_t rp_max_pulsefreq; /* Frequency of pulses in burst */ 126 u_int32_t rp_patterntype; /* fixed or variable pattern type*/ [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8dxl-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /delete-node/ &enet1_lpcg; 7 /delete-node/ &fec2; 10 conn_enet0_root_clk: clock-conn-enet0-root { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <250000000>; 14 clock-output-names = "conn_enet0_root_clk"; 17 clk_dummy: clock-dummy { 18 compatible = "fixed-clock"; [all …]
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H A D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8ulp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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H A D | imx8-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 conn_axi_clk: clock-conn-axi { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <333333333>; 14 clock-output-names = "conn_axi_clk"; 17 conn_ahb_clk: clock-conn-ahb { [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-zc1751-xm017-dc3.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm017-dc3 5 * (C) Copyright 2016 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-binding [all...] |
H A D | zynqmp-sck-kv-g-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 8 * "A" – A01 board un-modified (NXP) 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/net/ti-dp83867.h> 17 #include <dt-bindings/phy/phy.h> 18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 /dts-v1/; 23 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 24 #address-cells = <1>; [all …]
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H A D | zynqmp-sck-kv-g-revA.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 9 * "A" - A01 board un-modified (NXP) 10 * "Y" - A01 board modified with legacy interposer (Nexperia) 11 * "Z" - A01 board modified with Diode interposer 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/net/ti-dp83867.h> 18 #include <dt-bindings/phy/phy.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 model = "ZynqMP zc1751-xm015-dc1 RevA"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap3-n950-n9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff) 13 cpu0-supply = <&vcc>; 23 compatible = "regulator-fixed"; 24 regulator-name = "VEMMC"; 25 regulator-min-microvolt = <2900000>; 26 regulator-max-microvolt = <2900000>; 28 startup-delay-us = <150>; 29 enable-active-high; 33 compatible = "regulator-fixed"; [all …]
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H A D | omap3-igep.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 /dts-v1/; 19 stdout-path = &uart3; 23 compatible = "ti,omap-twl4030"; 28 vdd33: regulator-vdd33 { 29 compatible = "regulator-fixed"; 30 regulator-name = "vdd33"; 31 regulator-always-on; 37 gpmc_pins: gpmc-pins { 38 pinctrl-single,pins = < [all …]
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H A D | omap-gpmc-smsc911x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 vddvario: regulator-vddvario { 11 compatible = "regulator-fixed"; 12 regulator-name = "vddvario"; 13 regulator-always-on; 16 vdd33a: regulator-vdd33a { 17 compatible = "regulator-fixed"; 18 regulator-name = "vdd33a"; 19 regulator-always-on; 26 bank-width = <2>; [all …]
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H A D | omap-gpmc-smsc9221.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 vddvario: regulator-vddvario { 15 compatible = "regulator-fixed"; 16 regulator-name = "vddvario"; 17 regulator-always-on; 20 vdd33a: regulator-vdd33a { 21 compatible = "regulator-fixed"; 22 regulator-name = "vdd33a"; 23 regulator-always-on; 30 bank-width = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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/freebsd/contrib/ntp/html/drivers/ |
H A D | driver7.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> 4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1"> 13 <!-- #BeginDate format:En2m -->17-Jul-2014 02:17<!-- #EndDate --> 20 Modem Port: <tt>/dev/chu<i>u</i></tt>; 300 baud, 8-bits, no parity<br> 21 Autotune Port: <tt>/dev/icom</tt>; 1200/9600 baud, 8-bits, no parity<br> 25 …from Canadian time/frequency station <a href="http://inms-ienm.nrc-cnrc.gc.ca/time_services/shortw… 31 …-compatible, 300-b/s modem or modem chip, as described on the <a href="../pps.html">Pulse-per-seco… 32 …d ray geometry. In Newark DE, 625 km from the transmitter, the predicted one-hop propagation delay… 33 …r, the mean offset with a 2.4-GHz P4 running FreeBSD 6.1 is generally within 0.2 ms short-term wit… 37 …-kHz μ-law companded codec samples using maximum-likelihood techniques which exploit the consid… [all …]
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/freebsd/sys/kern/ |
H A D | kern_poll.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2001-2002 Luigi Rizzo 74 * call -- typically this is the number of packets to be received, or 106 SYSCTL_UINT(_kern_polling, OID_AUTO, burst, CTLFLAG_RD, 107 &poll_burst, 0, "Current polling burst size"); 119 if (error || !req->newptr ) in poll_burst_max_sysctl() 137 "Max Polling burst size"); 145 if (error || !req->newptr ) in poll_each_burst_sysctl() 163 "Max size of each burst"); [all …]
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/freebsd/sys/contrib/device-tree/src/arm/axis/ |
H A D | artpec6.dtsi | 2 * Device Tree Source for the Axis ARTPEC-6 SoC 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/interrupt-controller/arm-gic.h> 44 #include <dt-bindings/dma/nbpfaxi.h> 45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 51 interrupt-parent = <&intc>; 54 #address-cells = <1>; 55 #size-cells = <0>; [all …]
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