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/linux/Documentation/devicetree/bindings/phy/
H A Drealtek,usb3phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stanley Chang <stanley_chang@realtek.com>
23 XHCI controller#0 -- usb2phy -- phy#0
24 |- usb3phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
27 |- usb3phy -- phy#0
32 XHCI controller#0 -- usb2phy -- phy#0
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H A Dapm-xgene-phy.txt1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
19 Two set of 3-tuple setting for each (up to 3)
22 - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v14_0_2_pptable.h43 // SMU_14_0_2_PP_THERMALCONTROLLER - Thermal Controller Type
71 …IMING_TUNE = 1 << SMU_14_0_2_ODCAP_MEMORY_TIMING_TUNE, // Auto AC Timing Tuning
72 … = 1 << SMU_14_0_2_ODCAP_MANUAL_AC_TIMING, // Manual fine grain AC Timing tuning
73 …MIZER = 1 << SMU_14_0_2_ODCAP_AUTO_VF_CURVE_OPTIMIZER, // Fine grain auto VF curve tuning
169 … // PPTable_t in driver_if.h -- as requested by PMFW, this offset should start a…
/linux/drivers/clk/rockchip/
H A Dclk-mmc-phase.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
40 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
57 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
93 * for people to debug unstable mmc tuning results. in rockchip_mmc_set_phase()
97 return -EINVAL; in rockchip_mmc_set_phase()
104 * Due to the inexact nature of the "fine" delay, we might in rockchip_mmc_set_phase()
105 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase()
124 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase()
137 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), in rockchip_mmc_set_phase()
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/linux/include/sound/
H A Dseq_midi_emul.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 short gm_rpn_fine_tuning; /* Master fine tuning */
40 short gm_rpn_coarse_tuning; /* Master coarse tuning */
62 unsigned char gs_master_volume; /* SYSEX master volume: 0-127 */
84 /* 0-127 controller values */
91 * The usage is eg: chan->gm_bank_select. Another implementation would
131 * of coarse and fine pairs. Of course the fine controls are seldom used
134 #define SNDRV_GM_BANK_SELECT(cp) (((cp)->control[0]<<7)|((cp)->control[32]))
135 #define SNDRV_GM_MODULATION_WHEEL(cp) (((cp)->control[1]<<7)|((cp)->control[33]))
136 #define SNDRV_GM_BREATH(cp) (((cp)->control[2]<<7)|((cp)->control[34]))
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/linux/Documentation/devicetree/bindings/net/ieee802154/
H A Dat86rf230.txt4 - compatible: should be "atmel,at86rf230", "atmel,at86rf231",
6 - spi-max-frequency: maximal bus speed, should be set to 7500000 depends
8 - reg: the chipselect index
9 - interrupts: the interrupt generated by the device. Non high-level
13 - reset-gpio: GPIO spec for the rstn pin
14 - sleep-gpio: GPIO spec for the slp_tr pin
15 - xtal-trim: u8 value for fine tuning the internal capacitance
22 spi-max-frequency = <7500000>;
25 interrupt-parent = <&gpio3>;
26 xtal-trim = /bits/ 8 <0x06>;
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-naneng-combphy.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/phy/phy.h>
156 temp = readl(priv->mmio + reg); in rockchip_combphy_updatel()
158 writel(temp, priv->mmio + reg); in rockchip_combphy_updatel()
166 tmp = en ? reg->enable : reg->disable; in rockchip_combphy_param_write()
167 mask = GENMASK(reg->bitend, reg->bitstart); in rockchip_combphy_param_write()
168 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in rockchip_combphy_param_write()
170 return regmap_write(base, reg->offset, val); in rockchip_combphy_param_write()
175 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rockchip_combphy_is_ready()
178 mask = GENMASK(cfg->pipe_phy_status.bitend, in rockchip_combphy_is_ready()
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/linux/include/linux/mfd/
H A Dtc3589x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2010
141 * These values may be modified for fine tuning
150 * struct tc3589x_platform_data - TC3589x platform data
/linux/Documentation/fb/
H A Dtridentfb.rst27 2. The ramdac speeds require some more fine tuning. It is possible to
40 video=tridentfb:800x600-16@75,noaccel
70 mode a mode name like 800x600-8@75 as described in
/linux/drivers/mmc/host/
H A Ddw_mmc-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/slot-gpio.h>
16 #include "dw_mmc-pltfm.h"
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
46 unsigned long rate = clk_get_rate(host->ciu_clk); in rockchip_mmc_get_internal_phase()
78 struct dw_mci_rockchip_priv_data *priv = host->priv; in rockchip_mmc_get_phase()
79 struct clk *clock = sample ? priv->sample_clk : priv->drv_clk; in rockchip_mmc_get_phase()
81 if (priv->internal_phase) in rockchip_mmc_get_phase()
89 unsigned long rate = clk_get_rate(host->ciu_clk); in rockchip_mmc_set_internal_phase()
105 * for people to debug unstable mmc tuning results. in rockchip_mmc_set_internal_phase()
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/linux/drivers/video/backlight/
H A Dtdo24m.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
44 #define CMD_NULL (-1)
148 CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
166 CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
167 CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
176 struct spi_transfer *x = &lcd->xfer; in tdo24m_writes()
182 if (!lcd->color_invert && *p == CMD0(0x21)) in tdo24m_writes()
187 data = *p << (7 - nparams); in tdo24m_writes()
190 lcd->buf[0] = (data >> 8) & 0xff; in tdo24m_writes()
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/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dazoteq,iqs7211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS7210A, IQS7211A and IQS7211E trackpad and touchscreen control-
14 lers employ projected-capacitance sensing and can track two contacts.
21 - azoteq,iqs7210a
22 - azoteq,iqs7211a
23 - azoteq,iqs7211e
28 irq-gpios:
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/linux/drivers/gpu/drm/i915/gt/
H A Dintel_workarounds.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2014-2018 Intel Corporation
30 * - Context workarounds: workarounds that touch registers that are
40 * - Engine workarounds: the list of these WAs is applied whenever the specific
60 * - GT workarounds: the list of these WAs is applied whenever these registers
66 * - Register whitelist: some workarounds need to be implemented in userspace,
70 * these to/be-whitelisted registers to some special HW registers).
75 * - Workaround batchbuffers: buffers that get executed automatically by the
91 * - Other: There are WAs that, due to their nature, cannot be applied from a
103 wal->gt = gt; in wa_init_start()
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/linux/Documentation/process/
H A Dstable-api-nonsense.rst8 Greg Kroah-Hartman <greg@kroah.com>
21 kernel that still work just fine on the latest 2.6 kernel release.
27 -----------------
38 -----
41 to worry about the in-kernel interfaces changing. For the majority of
59 -----------------------
64 - Depending on the version of the C compiler you use, different kernel
71 - Depending on what kernel build options you select, a wide range of
74 - different structures can contain different fields
75 - Some functions may not be implemented at all, (i.e. some locks
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/linux/drivers/media/i2c/
H A Dmt9t112.c1 // SPDX-License-Identifier: GPL-2.0
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
20 * v4l-utils compliance tools will report errors.
30 #include <linux/v4l2-mediabus.h>
34 #include <media/v4l2-common.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
158 msg[0].addr = client->addr; in __mt9t112_reg_read()
163 msg[1].addr = client->addr; in __mt9t112_reg_read()
172 ret = i2c_transfer(client->adapter, msg, 2); in __mt9t112_reg_read()
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/linux/arch/x86/include/asm/
H A Dcpu_device_id.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT)
25 #define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT)
26 #define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT)
47 #include <asm/intel-family.h>
61 * X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE - Base macro for CPU matching
101 * X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Macro for CPU matching
119 * X86_MATCH_VENDOR_FAM_FEATURE - Macro for matching vendor, family and CPU feature
136 * X86_MATCH_VENDOR_FEATURE - Macro for matching vendor and CPU feature
151 * X86_MATCH_FEATURE - Macro for matching a CPU feature
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H A Dx86_init.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct x86_init_mpparse - platform specific mpparse ops
28 * struct x86_init_resources - platform specific resource related ops
43 * struct x86_init_irqs - platform specific interrupt setup
60 * struct x86_init_oem - oem platform specific customizing functions
70 * struct x86_init_paging - platform specific paging functions
81 * struct x86_init_timers - platform specific timer setup
94 * struct x86_init_iommu - platform specific iommu setup
102 * struct x86_init_pci - platform specific pci init functions
116 * struct x86_hyper_init - x86 hypervisor init functions
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu14_driver_if_v14_0.h517 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
518 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis…
520 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
1106 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1107 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1108 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1109 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1110 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
1116 …//Linear offset or GB term to account for mis-correlation between PSM and Vmin shift trends across…
1179 …uint16_t DfllMstrOscConfigA; //Used for voltage sensitivity slope tuning: 0 = (en_leaker << 9…
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H A Dsmu13_driver_if_v13_0_0.h503 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
504 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis…
506 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
1007 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1008 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1009 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1010 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1011 uint16_t Vmin_Aging_Offset[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Worst-case aging margin
1017 …//Linear offset or GB term to account for mis-correlation between PSM and Vmin shift trends across…
1111 uint32_t DcsFoptM; //Tuning paramters to shift Fopt calculation
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/linux/net/netfilter/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
71 and is also scheduled to replace the old syslog-based ipt_LOG
107 If both are enabled the backend to use can be configured at run-time
108 by means of per-address-family sysctl tunables.
182 This allows you to store the flow start-time and to obtain
183 the flow-stop time (once it has been destroyed) via Connection
191 This option enables support for assigning user-defined flag bits
223 bool 'UDP-Lite protocol connection tracking support'
228 tracking code will be able to do state tracking on UDP-Lite
242 connection tracking and natting code to allow the sub-channels that
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/linux/drivers/clk/st/
H A Dclkgen-fsyn.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk-provider.h>
129 { .name = "clk-s-c0-fs0-ch0", },
130 { .name = "clk-s-c0-fs0-ch1", },
131 { .name = "clk-s-c0-fs0-ch2", },
132 { .name = "clk-s-c0-fs0-ch3", },
186 { .name = "clk-s-d0-fs0-ch0", },
187 { .name = "clk-s-d0-fs0-ch1", },
188 { .name = "clk-s-d0-fs0-ch2", },
189 { .name = "clk-s-d0-fs0-ch3", },
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/linux/sound/core/seq/
H A Dseq_midi_emul.c1 // SPDX-License-Identifier: GPL-2.0-or-later
62 * Generic MIDI - no interpretation at all, it will just save current values
64 * GM - You can use all gm_ prefixed elements of chan. Controls, RPN, NRPN,
66 * GS - You can use all gs_ prefixed elements of chan. Codes for GS will be
68 * XG - You can use all xg_ prefixed elements of chan. Codes for XG will
84 if (chanset->channels == NULL) in snd_midi_process_event()
88 dest_channel = ev->data.note.channel; in snd_midi_process_event()
89 if (dest_channel >= chanset->max_channels) { in snd_midi_process_event()
91 dest_channel, chanset->max_channels); in snd_midi_process_event()
96 chan = chanset->channels + dest_channel; in snd_midi_process_event()
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/linux/Documentation/admin-guide/mm/
H A Dmemory-hotplug.rst20 - The physical memory available to a machine can be adjusted at runtime, up- or
25 - Replacing hardware, such as DIMMs or whole NUMA nodes, without downtime. One
28 - Reducing energy consumption either by physically unplugging memory modules or
32 used to expose persistent memory, other performance-differentiated memory and
39 ------------------------------
54 ------------------------
71 --------------------------
94 ------------------
112 --------------
152 -------------------------------
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/linux/arch/x86/kernel/
H A Dtsc_sync.c1 // SPDX-License-Identifier: GPL-2.0
8 * print a warning if not and turn off the TSC clock-source.
10 * The warp-check is point-to-point between two CPUs, the CPU
14 * Only two CPUs may participate - they can enter in any order.
63 if (!resume && time_before(jiffies, adj->nextcheck)) in tsc_verify_tsc_adjust()
66 adj->nextcheck = jiffies + HZ; in tsc_verify_tsc_adjust()
69 if (adj->adjusted == curval) in tsc_verify_tsc_adjust()
73 wrmsrl(MSR_IA32_TSC_ADJUST, adj->adjusted); in tsc_verify_tsc_adjust()
75 if (!adj->warned || resume) { in tsc_verify_tsc_adjust()
76 pr_warn(FW_BUG "TSC ADJUST differs: CPU%u %lld --> %lld. Restoring\n", in tsc_verify_tsc_adjust()
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/linux/drivers/media/dvb-core/
H A Ddvb_frontend.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dvb_frontend.c: DVB frontend tuning interface/thread
5 * Copyright (C) 1999-2001 Ralph Metzler
10 * Copyright (C) 2004 Andrew de Quincey (tuning thread cleanup)
57 MODULE_PARM_DESC(dvb_mfe_wait_time, "Wait up to <mfe_wait_time> seconds on open() for multi-fronten…
77 * FESTATE_IDLE. No tuning parameters have been supplied and the loop is idling.
79 * FESTATE_TUNING_FAST. Tuning parameters have been supplied and fast zigzag scan is in progress.
80 …* FESTATE_TUNING_SLOW. Tuning parameters have been supplied. Fast zigzag failed, so we're trying a…
136 struct dvb_frontend_private *fepriv = fe->frontend_priv; in __dvb_frontend_free()
139 dvb_device_put(fepriv->dvbdev); in __dvb_frontend_free()
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