| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | mpc5121-psc.txt | 4 ----------------
7 are specified by fsl,mpc5121-psc-uart nodes in the
8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
9 Controller node fsl,mpc5121-psc-fifo is required there:
11 fsl,mpc512x-psc-uart nodes
12 --------------------------
15 - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc"
17 - reg : Offset and length of the register set for the PSC device
18 - interrupts : <a b> where a is the interrupt number of the
19 PSC FIFO Controller and b is a field that represents an
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| /freebsd/usr.sbin/bhyve/amd64/ |
| H A D | ps2mouse.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
89 struct fifo { struct
93 int num; /* number of bytes in the fifo */ argument
94 int size; /* size of the fifo */ argument
105 struct fifo fifo; member
116 struct fifo *fifo; in fifo_init() local
118 fifo = &sc->fifo; in fifo_init()
119 fifo->size = sizeof(((struct fifo *)0)->buf); in fifo_init()
125 struct fifo *fifo; in fifo_reset() local
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| H A D | ps2kbd.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
73 struct fifo { struct
77 int num; /* number of bytes in the fifo */ argument
78 int size; /* size of the fifo */ argument
86 struct fifo fifo; member
215 struct fifo *fifo; in fifo_init() local
217 fifo = &sc->fifo; in fifo_init()
218 fifo->size = sizeof(((struct fifo *)0)->buf); in fifo_init()
224 struct fifo *fifo; in fifo_reset() local
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | ibm,emac.txt | 8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
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| H A D | altr,tse.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Chevallier <maxime.chevallier@bootlin.com>
15 - const: altr,tse-1.0
16 - const: ALTR,tse-1.0
18 - const: altr,tse-msgdma-1.0
23 interrupt-names:
25 - const: rx_irq
26 - const: tx_irq
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| H A D | altera_tse.txt | 1 * Altera Triple-Speed Ethernet MAC driver (TSE)
4 - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
5 be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
8 - reg: Address and length of the register set for the device. It contains
9 the information of registers in the same order as described by reg-names
10 - reg-names: Should contain the reg names
18 - interrupts: Should contain the TSE interrupts and its mode.
19 - interrupt-names: Should contain the interrupt names
22 - rx-fifo-depth: MAC receive FIFO buffer depth in bytes
23 - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
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| /freebsd/sys/contrib/device-tree/src/powerpc/ |
| H A D | mpc5121.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 #include <dt-bindings/clock/mpc512x-clock.h>
10 /dts-v1/;
15 #address-cell
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| H A D | eiger.dts | 11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
39 i-cache-line-size = <32>;
40 d-cache-line-size = <32>;
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| H A D | arches.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
17 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
24 dcr-parent = <&{/cpus/cpu@0}>;
34 #address-cells = <1>;
35 #size-cells = <0>;
41 clock-frequency = <0>; /* Filled in by U-Boot */
42 timebase-frequency = <0>; /* Filled in by U-Boot */
43 i-cache-line-size = <32>;
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| H A D | ac14xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
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| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_udma_regs_s2m.h | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
86 * 00 - No pending tasks
100 * 0 - Log is enable
101 * 1 - Log is masked.
127 /* [0x28] S2M stream data FIFO status */
129 /* [0x2c] S2M stream header FIFO status */
131 /* [0x30] S2M AXI data FIFO status */
133 /* [0x34] S2M unack FIFO status */
138 * [0x3c] S2M prefetch FIFO status.
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| H A D | al_hal_udma_regs_m2s.h | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
84 * 00 - No pending tasks
98 * 0 - Log is enabled.
99 * 1 - Log is masked.
125 /* [0x28] M2S data FIFO status */
127 /* [0x2c] M2S header FIFO status */
129 /* [0x30] M2S unack FIFO status */
134 * [0x38] M2S prefetch FIFO status.
139 * [0x3c] M2S completion FIFO status.
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| H A D | al_hal_udma_config.h | 9 found at http://www.gnu.org/licenses/gpl-2.0.html
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
114 uint8_t ack_fifo_depth; /* size of the stream application ack fifo */
123 /** M2S max packet size configuration */
139 uint8_t min_burst_above_thr; /* min burst size when fifo above
142 uint8_t min_burst_below_thr; /* min burst size when fifo below
146 * read FIFO, defined based on header
147 * FIFO size
150 * data read FIFO,
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| /freebsd/usr.sbin/bhyve/ |
| H A D | uart_backend.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
64 struct fifo { struct
68 int num; /* number of characters in the fifo */ argument
69 int size; /* size of the fifo */ argument
74 struct fifo rxfifo;
101 tcgetattr(tf->rfd, &orig); in ttyopen()
105 tcsetattr(tf->rfd, TCSANOW, &new); in ttyopen()
119 len = read(tf->rfd, &rb, 1); in ttyread()
129 return (write(tf->wfd, &wb, 1)); in ttywrite()
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| /freebsd/sys/contrib/dev/rtw88/ |
| H A D | mac.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
94 return -ETIMEDOUT; in rtw_mac_pre_system_cfg()
107 return -EINVAL; in rtw_mac_pre_system_cfg()
156 if (cmd->base == RTW_PWR_ADDR_SDIO) in rtw_pwr_cmd_polling()
157 offset = cmd->offset | SDIO_LOCAL_OFFSET; in rtw_pwr_cmd_polling()
159 offset = cmd->offset; in rtw_pwr_cmd_polling()
161 if (do_pwr_poll_cmd(rtwdev, offset, cmd->mask, cmd->value)) in rtw_pwr_cmd_polling()
169 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
173 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
32 increased automatically with max(cs-gpios, hardware chip selects).
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| H A D | cdns,qspi-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vaishnav Achath <vaishnav.a@ti.com>
13 - $ref: spi-controller.yaml#
14 - if:
18 const: xlnx,versal-ospi-1.0
21 - power-domains
22 - if:
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| /freebsd/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | sam9x60.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
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| /freebsd/sys/dev/cas/ |
| H A D | if_casreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius
84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies
85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS.
88 #define CAS_INTR_TX_ALL 0x00000002 /* TX frames trans. to FIFO. */
90 #define CAS_INTR_TX_TAG_ERR 0x00000008 /* TX FIFO tag corrupted. */
93 #define CAS_INTR_RX_TAG_ERR 0x00000040 /* RX FIFO tag corrupted. */
116 #define CAS_BIM_CONF_BD64_DIS 0x00000004 /* 64-bit mode disable */
118 #define CAS_BIM_CONF_BUS32_WIDE 0x00000010 /* PCI bus is 32-bit (ro). */
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| /freebsd/sys/dev/usb/input/ |
| H A D | uhid_snes.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
73 SNES_DEV(0x0810, 0xe501, 0), /* GeeekPi K-0161 */
169 err = usbd_req_get_report(sc->sc_udev, NULL, kern_data, in uhid_get_report()
170 len, sc->sc_iface_index, type, id); in uhid_get_report()
204 err = usbd_req_set_report(sc->sc_udev, NULL, kern_data, in uhid_set_report()
205 len, sc->sc_iface_index, type, id); in uhid_set_report()
218 uhid_snes_open(struct usb_fifo *fifo, int fflags) in uhid_snes_open() argument
220 struct uhid_snes_softc *sc = usb_fifo_softc(fifo); in uhid_snes_open()
223 if (sc->sc_fflags & fflags) { in uhid_snes_open()
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| H A D | uhid.c | 7 /*-
8 * SPDX-License-Identifier: BSD-2-Clause
89 #define UHID_BSIZE 1024 /* bytes, buffer size */
173 if (usb_fifo_get_data(sc->sc_fifo.fp[USB_FIFO_TX], pc, in uhid_intr_write_callback()
209 if ((actlen >= (int)sc->sc_isize) || in uhid_intr_read_callback()
210 ((actlen > 0) && (sc->sc_iid != 0))) { in uhid_intr_read_callback()
212 if (actlen > (int)sc->sc_isize) in uhid_intr_read_callback()
213 actlen = sc->sc_isize; in uhid_intr_read_callback()
214 usb_fifo_put_data(sc->sc_fifo.fp[USB_FIFO_RX], pc, in uhid_intr_read_callback()
218 * Do not do read-ahead, because this may lead in uhid_intr_read_callback()
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| /freebsd/sys/contrib/device-tree/Bindings/edac/ |
| H A D | socfpga-eccmgr.txt | 8 - compatible : Should be "altr,socfpga-ecc-manager"
9 - #address-cells: must be 1
10 - #size-cells: must be 1
11 - ranges : standard definition, should translate from local addresses
17 - compatible : Should be "altr,socfpga-l2-ecc"
18 - reg : Address and size for ECC error interrupt clear registers.
19 - interrupts : Should be single bit error interrupt, then double bit error
24 - compatible : Should be "altr,socfpga-ocram-ecc"
25 - reg : Address and size for ECC error interrupt clear registers.
26 - iram : phandle to On-Chip RAM definition.
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| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | synopsys-dw-mshc-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: mmc-controller.yaml#
13 - Ulf Hansson <ulf.hansson@linaro.org>
20 reset-names:
23 clock-frequency:
29 fifo-depth:
31 The maximum size of the tx/rx fifo's. If this property is not
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| /freebsd/sys/dev/gve/ |
| H A D | gve_tx.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2023-2024 Google LLC
40 struct gve_queue_page_list *qpl = tx->com.qpl; in gve_tx_fifo_init()
41 struct gve_tx_fifo *fifo = &tx->fifo; in gve_tx_fifo_init() local
43 fifo->size = qpl->num_pages * PAGE_SIZE; in gve_tx_fifo_init()
44 fifo->base = qpl->kva; in gve_tx_fifo_init()
45 atomic_store_int(&fifo->available, fifo->size); in gve_tx_fifo_init()
46 fifo->head = 0; in gve_tx_fifo_init()
54 struct gve_tx_ring *tx = &priv->tx[i]; in gve_tx_free_ring_gqi()
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| /freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 data into DMA. It provides real time data to the back-end panel
26 - enum:
27 - mediatek,mt2701-disp-rdma
28 - mediatek,mt8173-disp-rdma
29 - mediatek,mt8183-disp-rdma
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