xref: /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/mpc5121-psc.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel VadotMPC5121 PSC Device Tree Bindings
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotPSC in UART mode
4*c66ec88fSEmmanuel Vadot----------------
5*c66ec88fSEmmanuel Vadot
6*c66ec88fSEmmanuel VadotFor PSC in UART mode the needed PSC serial devices
7*c66ec88fSEmmanuel Vadotare specified by fsl,mpc5121-psc-uart nodes in the
8*c66ec88fSEmmanuel Vadotfsl,mpc5121-immr SoC node. Additionally the PSC FIFO
9*c66ec88fSEmmanuel VadotController node fsl,mpc5121-psc-fifo is required there:
10*c66ec88fSEmmanuel Vadot
11*c66ec88fSEmmanuel Vadotfsl,mpc512x-psc-uart nodes
12*c66ec88fSEmmanuel Vadot--------------------------
13*c66ec88fSEmmanuel Vadot
14*c66ec88fSEmmanuel VadotRequired properties :
15*c66ec88fSEmmanuel Vadot - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc"
16*c66ec88fSEmmanuel Vadot   Supported <soc>s: mpc5121, mpc5125
17*c66ec88fSEmmanuel Vadot - reg : Offset and length of the register set for the PSC device
18*c66ec88fSEmmanuel Vadot - interrupts : <a b> where a is the interrupt number of the
19*c66ec88fSEmmanuel Vadot   PSC FIFO Controller and b is a field that represents an
20*c66ec88fSEmmanuel Vadot   encoding of the sense and level information for the interrupt.
21*c66ec88fSEmmanuel Vadot
22*c66ec88fSEmmanuel VadotRecommended properties :
23*c66ec88fSEmmanuel Vadot - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4)
24*c66ec88fSEmmanuel Vadot - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4)
25*c66ec88fSEmmanuel Vadot
26*c66ec88fSEmmanuel VadotPSC in SPI mode
27*c66ec88fSEmmanuel Vadot---------------
28*c66ec88fSEmmanuel Vadot
29*c66ec88fSEmmanuel VadotSimilar to the UART mode a PSC can be operated in SPI mode. The compatible used
30*c66ec88fSEmmanuel Vadotfor that is fsl,mpc5121-psc-spi. It requires a fsl,mpc5121-psc-fifo as well.
31*c66ec88fSEmmanuel VadotThe required and recommended properties are identical to the
32*c66ec88fSEmmanuel Vadotfsl,mpc5121-psc-uart nodes, just use spi instead of uart in the compatible
33*c66ec88fSEmmanuel Vadotstring.
34*c66ec88fSEmmanuel Vadot
35*c66ec88fSEmmanuel Vadotfsl,mpc512x-psc-fifo node
36*c66ec88fSEmmanuel Vadot-------------------------
37*c66ec88fSEmmanuel Vadot
38*c66ec88fSEmmanuel VadotRequired properties :
39*c66ec88fSEmmanuel Vadot - compatible : Should be "fsl,<soc>-psc-fifo"
40*c66ec88fSEmmanuel Vadot   Supported <soc>s: mpc5121, mpc5125
41*c66ec88fSEmmanuel Vadot - reg : Offset and length of the register set for the PSC
42*c66ec88fSEmmanuel Vadot         FIFO Controller
43*c66ec88fSEmmanuel Vadot - interrupts : <a b> where a is the interrupt number of the
44*c66ec88fSEmmanuel Vadot   PSC FIFO Controller and b is a field that represents an
45*c66ec88fSEmmanuel Vadot   encoding of the sense and level information for the interrupt.
46*c66ec88fSEmmanuel Vadot
47*c66ec88fSEmmanuel VadotRecommended properties :
48*c66ec88fSEmmanuel Vadot - clocks : specifies the clock needed to operate the fifo controller
49*c66ec88fSEmmanuel Vadot - clock-names : name(s) for the clock(s) listed in clocks
50*c66ec88fSEmmanuel Vadot
51*c66ec88fSEmmanuel VadotExample for a board using PSC0 and PSC1 devices in serial mode:
52*c66ec88fSEmmanuel Vadot
53*c66ec88fSEmmanuel Vadotserial@11000 {
54*c66ec88fSEmmanuel Vadot	compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
55*c66ec88fSEmmanuel Vadot	cell-index = <0>;
56*c66ec88fSEmmanuel Vadot	reg = <0x11000 0x100>;
57*c66ec88fSEmmanuel Vadot	interrupts = <40 0x8>;
58*c66ec88fSEmmanuel Vadot	interrupt-parent = < &ipic >;
59*c66ec88fSEmmanuel Vadot	fsl,rx-fifo-size = <16>;
60*c66ec88fSEmmanuel Vadot	fsl,tx-fifo-size = <16>;
61*c66ec88fSEmmanuel Vadot};
62*c66ec88fSEmmanuel Vadot
63*c66ec88fSEmmanuel Vadotserial@11100 {
64*c66ec88fSEmmanuel Vadot	compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
65*c66ec88fSEmmanuel Vadot	cell-index = <1>;
66*c66ec88fSEmmanuel Vadot	reg = <0x11100 0x100>;
67*c66ec88fSEmmanuel Vadot	interrupts = <40 0x8>;
68*c66ec88fSEmmanuel Vadot	interrupt-parent = < &ipic >;
69*c66ec88fSEmmanuel Vadot	fsl,rx-fifo-size = <16>;
70*c66ec88fSEmmanuel Vadot	fsl,tx-fifo-size = <16>;
71*c66ec88fSEmmanuel Vadot};
72*c66ec88fSEmmanuel Vadot
73*c66ec88fSEmmanuel Vadotpscfifo@11f00 {
74*c66ec88fSEmmanuel Vadot	compatible = "fsl,mpc5121-psc-fifo";
75*c66ec88fSEmmanuel Vadot	reg = <0x11f00 0x100>;
76*c66ec88fSEmmanuel Vadot	interrupts = <40 0x8>;
77*c66ec88fSEmmanuel Vadot	interrupt-parent = < &ipic >;
78*c66ec88fSEmmanuel Vadot};
79