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/freebsd/lib/libpmc/
H A Dpmc.atom.315 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 .Bl -tag -width "Li PMC_CLASS_IAP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "IA-32 Intel(R) Architecture Software Developer's Manual"
60 .%N "Order Number 253669-027US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
83 .Ss Event Qualifiers
84 Event specifiers for these PMCs support the following common
86 .Bl -tag -width indent
94 Configure the PMC to count the number of de-asserted to asserted
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H A Dpmc.core.315 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 .%B IA-32 Intel\(rg Architecture Software Developer's Manual
52 .%N Order Number 253669-027US
63 .Bl -column "PMC_CAP_INTERRUPT" "Support"
77 .Ss Event Qualifiers
78 Event specifiers for these PMCs support the following common
80 .Bl -tag -width indent
86 Configure the PMC to count the number of de-asserted to asserted
112 Events that require core-specificity to be specified use a
118 .Bl -tag -width indent -compact
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H A Dpmc.core2.315 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 .Bl -tag -width "Li PMC_CLASS_IAP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "IA-32 Intel(R) Architecture Software Developer's Manual"
60 .%N "Order Number 253669-027US"
67 Not all CPUs in this family implement fixed-function counters.
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
84 .Ss Event Qualifiers
85 Event specifiers for these PMCs support the following common
87 .Bl -tag -width indent
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H A Dpmc.haswell.316 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
59 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
61 .%N "Order Number: 325462-045US"
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
84 .Ss Event Qualifiers
85 Event specifiers for these PMCs support the following common
87 .Bl -tag -width indent
89 Configure the Off-core Response bits.
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H A Dpmc.haswellxeon.317 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
46 .Bl -tag -width "Li PMC_CLASS_IAP"
48 Fixed-function counters that count only one hardware event per counter.
60 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
62 .%N "Order Number: 325462-052US"
71 .Bl -column "PMC_CAP_INTERRUPT" "Support"
85 .Ss Event Qualifiers
86 Event specifiers for these PMCs support the following common
88 .Bl -tag -width indent
90 Configure the Off-core Response bits.
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H A Dpmc.ivybridgexeon.316 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
59 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
60 .%N "Order Number: 325462-045US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
83 .Ss Event Qualifiers
84 Event specifiers for these PMCs support the following common
86 .Bl -tag -width indent
88 Configure the Off-core Response bits.
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H A Dpmc.amd.31 .\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved.
15 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
54 .Bl -column "PMC_CAP_INTERRUPT" "Support"
68 .Ss Event Qualifiers
69 Event specifiers for AMD K8 PMCs can have the following optional
71 .Bl -tag -width indent
77 Configure the counter to only count negated-to-asserted transitions
91 Many event specifier
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H A Dpmc.sandybridge.316 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
62 .%B "Intel(R) 64 and IA-32 Architectures Software Developers Manual"
64 .%N "Order Number: 253669-039US"
73 .Bl -column "PMC_CAP_INTERRUPT" "Support"
87 .Ss Event Qualifiers
88 Event specifiers for these PMCs support the following common
90 .Bl -tag -width indent
92 Configure the Off-core Response bits.
[all …]
H A Dpmc.sandybridgexeon.316 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
59 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
61 .%N "Order Number: 253669-043US"
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
84 .Ss Event Qualifiers
85 Event specifiers for these PMCs support the following common
87 .Bl -tag -width indent
89 Configure the Off-core Response bits.
[all …]
H A Dpmc.ivybridge.315 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 .Bl -tag -width "Li PMC_CLASS_IAP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
60 .%N "Order Number: 253669-043US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
83 .Ss Event Qualifiers
84 Event specifiers for these PMCs support the following common
86 .Bl -tag -width indent
88 Configure the Off-core Response bits.
[all …]
H A Dpmc.westmere.315 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 .Bl -tag -width "Li PMC_CLASS_IAP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
83 .Ss Event Qualifiers
84 Event specifiers for these PMCs support the following common
86 .Bl -tag -width indent
88 Configure the Off-core Response bits.
[all …]
H A Dpmc.corei7.315 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 .Bl -tag -width "Li PMC_CLASS_IAP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
67 Not all CPUs in this family implement fixed-function counters.
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
84 .Ss Event Qualifiers
85 Event specifiers for these PMCs support the following common
87 .Bl -tag -width indent
[all …]
H A Dpmc.atomsilvermont.316 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
59 .%B "Intel 64 and IA-32 Intel(R) Architecture Software Developer's Manual"
61 .%N "Order Number 325462-050US"
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
84 .Ss Event Qualifiers
85 Event specifiers for these PMCs support the following common
87 .Bl -tag -width indent
95 Configure the PMC to count the number of de-asserted to asserted
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DGDBRemoteSignals.cpp1 //===-- GDBRemoteSignals.cpp ----------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
20 // clang-format off in Reset()
45 AddSignal(23, "SIGIO", false, true, true, "input/output ready/Pollable event"); in Reset()
55 AddSignal(33, "SIGPOLL", false, true, true, "pollable event"); in Reset()
68 AddSignal(45, "SIG33", false, false, false, "real-time event 33"); in Reset()
69 AddSignal(46, "SIG34", false, false, false, "real-time event 34"); in Reset()
70 AddSignal(47, "SIG35", false, false, false, "real-time event 35"); in Reset()
71 AddSignal(48, "SIG36", false, false, false, "real-time event 36"); in Reset()
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/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dqcom,ath11k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kalle Valo <kvalo@kernel.org>
20 - qcom,ipq8074-wifi
21 - qcom,ipq6018-wifi
22 - qcom,wcn6750-wifi
23 - qcom,ipq5018-wifi
32 interrupt-names:
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/freebsd/crypto/heimdal/kcm/
H A Devents.c23 * ARE DISCLAIMED. IN NO EVENT SHALL PADL SOFTWARE OR CONTRIBUTORS BE LIABLE
37 /* thread-safe in case we multi-thread later */
48 kcm_event *event) in kcm_enqueue_event() argument
52 if (event->action == KCM_EVENT_NONE) { in kcm_enqueue_event()
57 ret = kcm_enqueue_event_internal(context, event); in kcm_enqueue_event()
67 strftime(buf, 64, "%m-%dT%H:%M", gmtime(&time)); in print_times()
73 log_event(kcm_event *event, char *msg) in log_event() argument
77 print_times(event->fire_time, fire_time); in log_event()
78 print_times(event->expire_time, expire_time); in log_event()
80 kcm_log(7, "%s event %08x: fire_time %s fire_count %d expire_time %s " in log_event()
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/freebsd/sys/netgraph/bluetooth/hci/
H A Dng_hci_evnt.c5 /*-
6 * SPDX-License-Identifier: BSD-2-Clause
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
54 ** HCI event processing module
59 * Event processing routines
83 * Process HCI event packet
87 ng_hci_process_event(ng_hci_unit_p unit, struct mbuf *event) in ng_hci_process_event() argument
92 /* Get event packet header */ in ng_hci_process_event()
93 NG_HCI_M_PULLUP(event, sizeof(*hdr)); in ng_hci_process_event()
94 if (event == NULL) in ng_hci_process_event()
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/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/
H A Dfloating-point.json5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
20 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
27 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
34 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
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/freebsd/lib/libdevdctl/
H A Devent.h1 /*-
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
51 /*-------------------------------- NVPairMap ---------------------------------*/
57 /*----------------------------------- Event ----------------------------------*/
60 * a device control event.
65 * example, ATTACH and DETACH events have "device-name" and "parent"
68 class Event
73 /** Event type */
75 /** Generic event notification. */
85 DETACH = '-'
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/freebsd/contrib/ntp/sntp/libevent/include/event2/
H A Devent.h2 * Copyright (c) 2000-2007 Niels Provos <provos@citi.umich.edu>
3 * Copyright (c) 2007-2012 Niels Provos and Nick Mathewson
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
35 Libevent is an event notification library for developing scalable network
37 function when a specific event occurs on a file descriptor or after a
41 Libevent is meant to replace the event loop found in event driven network
43 remove events dynamically without having to change the event loop.
47 epoll(4), and evports. The internal event mechanism is completely
48 independent of the exposed event API, and a simple update of Libevent can
51 the most scalable event notification mechanism available on an operating
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/freebsd/contrib/libevent/include/event2/
H A Devent.h2 * Copyright (c) 2000-2007 Niels Provos <provos@citi.umich.edu>
3 * Copyright (c) 2007-2012 Niels Provos and Nick Mathewson
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
35 Libevent is an event notification library for developing scalable network
37 function when a specific event occurs on a file descriptor or after a
41 Libevent is meant to replace the event loop found in event driven network
43 remove events dynamically without having to change the event loop.
47 epoll(4), and evports. The internal event mechanism is completely
48 independent of the exposed event API, and a simple update of Libevent can
51 the most scalable event notification mechanism available on an operating
[all …]
/freebsd/contrib/llvm-project/lldb/source/API/
H A DSBListener.cpp1 //===-- SBListener.cpp ----------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
51 return this->operator bool(); in IsValid()
59 void SBListener::AddEvent(const SBEvent &event) { in AddEvent() argument
60 LLDB_INSTRUMENT_VA(this, event); in AddEvent()
62 EventSP &event_sp = event.GetSP(); in AddEvent()
64 m_opaque_sp->AddEvent(event_sp); in AddEvent()
71 m_opaque_sp->Clear(); in Clear()
84 return m_opaque_sp->StartListeningForEventSpec( in StartListeningForEventClass()
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/freebsd/lib/libpmc/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dother.json3 "PublicDescription": "This event counts the occurrence count of the micro-operation split.",
6 "BriefDescription": "This event counts the occurrence count of the micro-operation split."
9 …"PublicDescription": "This event counts every cycle that no operation was committed because the ol…
12 …"BriefDescription": "This event counts every cycle that no operation was committed because the old…
15 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
18 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
21 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
24 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
27 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
30 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a55/
H A Dcache.json105 …event counts any linefills from the hardware prefetcher which cause an allocation into the L3 cach…
108 …event counts any linefills from the hardware prefetcher which cause an allocation into the L3 cach…
111 …-core L2 cache: This event does not count. +//0 If the core is configured without a per-core L2 ca…
114 …-core L2 cache: This event does not count. +//0 If the core is configured without a per-core L2 ca…
117 …che refill due to prefetch. This event counts any linefills from the prefetcher which cause an all…
120 …che refill due to prefetch. This event counts any linefills from the prefetcher which cause an all…
123 …tion": "Level 2 cache write streaming mode. This event counts for each cycle where the core is in …
126 …tion": "Level 2 cache write streaming mode. This event counts for each cycle where the core is in …
129 …: "Level 1 data cache entering write streaming mode.This event counts for each entry into write-st…
132 …: "Level 1 data cache entering write streaming mode.This event counts for each entry into write-st…
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/freebsd/contrib/processor-trace/libipt/test/src/
H A Dptunit-query.c2 * Copyright (c) 2013-2019, Intel Corporation
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
58 /* For tracking last-ip in tests. */
63 static const uint64_t pt_dfix_bad_ip = (1ull << 62) - 1ull;
65 /* A sign-extended address. */
69 static const uint64_t pt_dfix_max_ip = (1ull << 47) - 1ull;
72 static const uint64_t pt_dfix_max_cr3 = ((1ull << 47) - 1ull) & ~0x1full;
80 decoder->enabled = 1; in ptu_sync_decoder()
82 (void) pt_df_fetch(&decoder->next, decoder->pos, &decoder->config); in ptu_sync_decoder()
95 pos = encoder->pos; in cutoff()
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