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/linux/tools/perf/util/
H A Dcs-etm.c22 #include "cs-etm.h"
23 #include "cs-etm-decoder/cs-etm-decoder.h"
107 struct cs_etm_auxtrace *etm; member
129 static int cs_etm__process_timestamped_queues(struct cs_etm_auxtrace *etm);
130 static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm,
135 static u64 *get_cpu_data(struct cs_etm_auxtrace *etm, int cpu);
144 * encode the etm queue number as the upper 16 bit and the channel as
204 * The result is cached in etm->pid_fmt so this function only needs to be called
231 return etmq->etm->pid_fmt; in cs_etm__get_pid_fmt()
256 if (etmq->etm->per_thread_decoding) in cs_etm__insert_trace_id_node()
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a73/
H A Detm.json3 "PublicDescription": "ETM trace unit output 0",
6 "BriefDescription": "ETM trace unit output 0"
9 "PublicDescription": "ETM trace unit output 1",
12 "BriefDescription": "ETM trace unit output 1"
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a75/
H A Detm.json3 "PublicDescription": "ETM trace unit output 0",
6 "BriefDescription": "ETM trace unit output 0"
9 "PublicDescription": "ETM trace unit output 1",
12 "BriefDescription": "ETM trace unit output 1"
/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/
H A Dcore-imp-def.json117 "PublicDescription": "ETM extout bit 0",
120 "BriefDescription": "ETM extout bit 0"
123 "PublicDescription": "ETM extout bit 1",
126 "BriefDescription": "ETM extout bit 1"
129 "PublicDescription": "ETM extout bit 2",
132 "BriefDescription": "ETM extout bit 2"
135 "PublicDescription": "ETM extout bit 3",
138 "BriefDescription": "ETM extout bit 3"
459 …"PublicDescription": "Counts cycles that MSC is telling GPC to stall commit due to ETM ISTALL feat…
462 …"BriefDescription": "Counts cycles that MSC is telling GPC to stall commit due to ETM ISTALL featu…
/linux/drivers/hwtracing/coresight/
H A Dcoresight-etm.h144 * struct etm_config - configuration information related to an ETM
145 * @mode: controls various modes supported by this ETM/PTM.
209 * struct etm_drvdata - specifics associated to an ETM component
211 * @atclk: optional clock for the core parts of the ETM.
216 * @arch: ETM/PTM version number.
218 * @sticky_enable: true if ETM base configuration has been done.
260 "invalid CP14 access to ETM reg: %#x", off); in etm_writel()
274 "invalid CP14 access to ETM reg: %#x", off); in etm_readl()
H A Dcoresight-etm3x-core.c33 #include "coresight-etm.h"
34 #include "coresight-etm-perf.h"
111 * @drvdata: etm's private data structure.
349 * Possible to have cores with PTM (supports ret stack) and ETM in etm_parse_event_config()
514 * Configure the ETM only if the CPU is online. If it isn't online in etm_enable_sysfs()
535 dev_dbg(&csdev->dev, "ETM tracing enabled\n"); in etm_enable_sysfs()
629 * DYING hotplug callback is serviced by the ETM driver. in etm_disable_sysfs()
635 * Executing etm_disable_hw on the cpu whose ETM is being disabled in etm_disable_sysfs()
651 dev_dbg(&csdev->dev, "ETM tracing disabled\n"); in etm_disable_sysfs()
761 /* Provide power to ETM: ETMPDCR[3] == 1 */ in etm_init_arch_data()
[all …]
H A Dcoresight-etm-perf.c23 #include "coresight-etm-perf.h"
32 * An ETM context for a running event includes the perf aux handle
33 * and aux_data. For ETM, the aux_data (etm_event_data), consists of
42 * the ETM. Thus the event_data for the session must be part of the ETM context
348 * trace path for each CPU in the mask. If we don't find an ETM in etm_setup_aux()
359 * If there is no ETM associated with this CPU clear it from in etm_setup_aux()
369 * If AUX pause feature is enabled but the ETM driver does not in etm_setup_aux()
394 /* Find the default sink for this ETM */ in etm_setup_aux()
489 dev_err(&csdev->dev, "Failed to resume ETM event.\n"); in etm_event_start()
508 * Check if this ETM is allowed to trace, as decided in etm_event_start()
[all …]
H A Dcoresight-cti-platform.c127 /* Can optionally have an etm node - return if not */ in cti_plat_create_v8_etm_connection()
143 * The EXTOUT type signals from the ETM are connected to a set of input in cti_plat_create_v8_etm_connection()
152 * We look to see if the ETM coresight device associated with this in cti_plat_create_v8_etm_connection()
158 * probing of the ETM will call into the CTI driver API to update the in cti_plat_create_v8_etm_connection()
171 * must have a cpu, can have an ETM.
210 /* Create the v8 ETM associated connection */ in cti_plat_create_v8_connections()
H A Dcoresight-etm4x.h229 * System instructions to access ETM registers.
645 * Bit[15:0] - ARCHID, Identifies this component as an ETM
646 * * Bits[15:12] - architecture version of ETM
648 * * Bits[11:0] = 0xA13, architecture part number for ETM.
696 * ETM defines the bits for EL control (e.g, TRVICTLR, TRCACTRn).
729 * Driver representation of the ETM architecture.
730 * The version of an ETM component can be detected from
757 /* Interpretation of resource numbers change at ETM v4.3 architecture */
773 * @mode: Controls various modes supported by this ETM.
866 * struct etm4_save_state - state to be preserved when ETM is without power
[all …]
H A Dcoresight-etm4x-core.c44 #include "coresight-etm-perf.h"
248 * When the CPU supports FEAT_TRF, we could move the ETM to a trace
281 * trace in the ELs, it doesn't prevent the ETM from generating
812 * in the perf attributes defined in coresight-etm-perf.c. in etm4_parse_event_config()
896 * Executing etm4_enable_hw on the cpu whose ETM is being enabled in etm4_enable_sysfs()
913 dev_dbg(&csdev->dev, "ETM tracing enabled\n"); in etm4_enable_sysfs()
950 * set the ETM to trace prohibited region. in etm4_disable_trace_unit()
1091 * DYING hotplug callback is serviced by the ETM driver. in etm4_disable_sysfs()
1097 * Executing etm4_disable_hw on the cpu whose ETM is being disabled in etm4_disable_sysfs()
1116 dev_dbg(&csdev->dev, "ETM tracing disabled\n"); in etm4_disable_sysfs()
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3660-coresight.dtsi14 etm@ecc40000 {
32 etm@ecd40000 {
50 etm@ece40000 {
68 etm@ecf40000 {
161 etm@ed440000 {
179 etm@ed540000 {
197 etm@ed640000 {
215 etm@ed740000 {
H A Dhi6220-coresight.dtsi216 etm0: etm@f659c000 {
235 etm1: etm@f659d000 {
254 etm2: etm@f659e000 {
273 etm3: etm@f659f000 {
292 etm4: etm@f65dc000 {
311 etm5: etm@f65dd000 {
330 etm6: etm@f65de000 {
349 etm7: etm@f65df000 {
/linux/drivers/clk/mxs/
H A Dclk-imx23.c34 #define ETM (CLKCTRL + 0x00e0) macro
86 lcdif, etm, usb, usb_phy, enumerator
134 clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 6, 29); in mx23_clocks_init()
151 clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); in mx23_clocks_init()
H A Dclk-imx28.c37 #define ETM (CLKCTRL + 0x0130) macro
140 ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm, enumerator
202 clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 7, 29); in mx28_clocks_init()
223 clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); in mx28_clocks_init()
/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereone/
H A Dcore-imp-def.json117 "PublicDescription": "ETM extout bit 0",
120 "BriefDescription": "ETM extout bit 0"
123 "PublicDescription": "ETM extout bit 1",
126 "BriefDescription": "ETM extout bit 1"
129 "PublicDescription": "ETM extout bit 2",
132 "BriefDescription": "ETM extout bit 2"
135 "PublicDescription": "ETM extout bit 3",
138 "BriefDescription": "ETM extout bit 3"
/linux/arch/arm64/boot/dts/sprd/
H A Dsc9860.dtsi489 etm@11440000 {
506 etm@11540000 {
523 etm@11640000 {
540 etm@11740000 {
557 etm@11840000 {
574 etm@11940000 {
591 etm@11a40000 {
608 etm@11b40000 {
H A Dsc9836.dtsi117 etm@10440000 {
133 etm@10540000 {
149 etm@10640000 {
165 etm@10740000 {
H A Dums512.dtsi688 etm0: etm@3f040000 {
705 etm1: etm@3f140000 {
722 etm2: etm@3f240000 {
739 etm3: etm@3f340000 {
756 etm4: etm@3f440000 {
773 etm5: etm@3f540000 {
790 etm6: etm@3f640000 {
807 etm7: etm@3f740000 {
/linux/tools/perf/arch/arm/util/
H A Dpmu.c16 #include "../../../util/cs-etm.h"
24 /* add ETM default config here */ in perf_pmu__arch_init()
/linux/include/linux/
H A Dcoresight-pmu.h26 * arbitrary values for all ETM versions.
39 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
/linux/tools/include/linux/
H A Dcoresight-pmu.h26 * arbitrary values for all ETM versions.
39 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
/linux/arch/arm/boot/dts/st/
H A Dste-hrefv60plus.dtsi112 /* GPIO 70-77 used for ETM */
249 etm {
251 * Drive D19-D23 for the ETM PTM trace interface low,
/linux/Documentation/trace/coresight/
H A Dcoresight-etm4x-reference.rst13 Root: ``/sys/bus/coresight/devices/etm<N>``
65 CPU ID that this ETM is attached to.
649 ETM. The table below describes the bits, using the defines from the driver
729 implemented by the ETM [IDR0]
811 *Note a)* On startup the ETM is programmed to trace the complete address space
H A Dcoresight-ect.rst26 # ETM #----------->: : ^ #######
47 defined, unless the CPU/ETM combination is a v8 architecture, in which case
69 The ``cti_cpu<N>`` named CTIs are associated with a CPU, and any ETM used by
/linux/tools/perf/util/cs-etm-decoder/
H A DBuild1 perf-util-y += cs-etm-decoder.o

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