Home
last modified time | relevance | path

Searched +full:entry +full:- +full:address (Results 1 – 25 of 1046) sorted by relevance

12345678910>>...42

/linux/net/netlabel/
H A Dnetlabel_addrlist.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * NetLabel Network Address Lists
5 * This file contains network address list functions used to manage ordered
10 * Author: Paul Moore <paul@paul-moore.com>
14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2008
32 * Address List Functions
36 * netlbl_af4list_search - Search for a matching IPv4 address entry
37 * @addr: IPv4 address
41 * Searches the IPv4 address list given by @head. If a matching address entry
52 if (iter->valid && (addr & iter->mask) == iter->addr) in netlbl_af4list_search()
[all …]
H A Dnetlabel_domainhash.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Author: Paul Moore <paul@paul-moore.com>
14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2006, 2008
55 * netlbl_domhsh_free_entry - Frees a domain hash table entry
56 * @entry: the entry's RCU field
60 * function so that the memory allocated to a hash table entry can be released
64 static void netlbl_domhsh_free_entry(struct rcu_head *entry) in netlbl_domhsh_free_entry() argument
74 ptr = container_of(entry, struct netlbl_dom_map, rcu); in netlbl_domhsh_free_entry()
75 if (ptr->def.type == NETLBL_NLTYPE_ADDRSELECT) { in netlbl_domhsh_free_entry()
77 &ptr->def.addrsel->list4) { in netlbl_domhsh_free_entry()
[all …]
/linux/arch/sh/mm/
H A Dtlbex_32.c5 * Copyright (C) 2003 - 2012 Paul Mundt
24 unsigned long address) in handle_tlbmiss() argument
31 pte_t entry; in handle_tlbmiss() local
36 * 29-bit mode, or due to PMB configuration in 32-bit mode. in handle_tlbmiss()
38 if (address >= P3SEG && address < P3_ADDR_MAX) { in handle_tlbmiss()
39 pgd = pgd_offset_k(address); in handle_tlbmiss()
41 if (unlikely(address >= TASK_SIZE || !current->mm)) in handle_tlbmiss()
44 pgd = pgd_offset(current->mm, address); in handle_tlbmiss()
47 p4d = p4d_offset(pgd, address); in handle_tlbmiss()
50 pud = pud_offset(p4d, address); in handle_tlbmiss()
[all …]
/linux/Documentation/driver-api/cxl/platform/example-configurations/
H A Dflexible.rst1 .. SPDX-License-Identifier: GPL-2.0
15 * Cross-Bridge interleave is described in one CFMWS that covers all capacity.
16 * One CFMWS is also described per-host bridge.
17 * One CFMWS is also described per-device.
45 Window base address : 0000001000000000
60 Window base address : 0000002000000000
74 Window base address : 0000002200000000
88 Window base address : 0000003000000000
102 Window base address : 0000003100000000
116 Window base address : 0000003200000000
[all …]
/linux/mm/
H A Dpage_vma_mapped.c1 // SPDX-License-Identifier: GPL-2.0
22 if (pvmw->flags & PVMW_SYNC) { in map_pte()
24 pvmw->pte = pte_offset_map_lock(pvmw->vma->vm_mm, pvmw->pmd, in map_pte()
25 pvmw->address, &pvmw->ptl); in map_pte()
26 *ptlp = pvmw->ptl; in map_pte()
27 return !!pvmw->pte; in map_pte()
30 is_migration = pvmw->flags & PVMW_MIGRATION; in map_pte()
34 * in case *pvmw->pmd changes underneath us; so we need to in map_pte()
39 pvmw->pte = pte_offset_map_rw_nolock(pvmw->vma->vm_mm, pvmw->pmd, in map_pte()
40 pvmw->address, pmdvalp, ptlp); in map_pte()
[all …]
H A Dmemory.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * demand-loading started 01.12.91 - seems it is high on the list of
10 * things wanted, and it should be easy to implement. - Linus
14 * Ok, demand-loading was easy, shared pages a little bit tricker. Shared
15 * pages started 02.12.91, seems to work. - Linus.
21 * Also corrected some "invalidate()"s - I wasn't doing enough of them.
27 * 19.12.91 - works, somewhat. Sometimes I get faults, don't know why.
29 * 20.12.91 - Ok, making the swap-device changeable like the root.
33 * 05.04.94 - Multi-page memory management added for v1.1.
36 * 16.07.99 - Support of BIGMEM added by Gerhard Wichert, Siemens AG
[all …]
/linux/drivers/scsi/
H A Dqla1280.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
77 /* Command retry count (0-65535) */
85 /* ISP request and response entry counts (37-65535) */
95 /* NOTE: the sp->cmd will be NULL when this completion is
126 #define ISP_CFG1_F128 BIT_6 /* 128-byte FIFO threshold */
127 #define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */
128 #define ISP_CFG1_F32 BIT_5 /* 128-byte FIFO threshold */
129 #define ISP_CFG1_F16 BIT_4 /* 128-byte FIFO threshold */
139 #define PCI_64BIT_SLOT BIT_14 /* PCI 64-bit slot indicator. */
150 uint16_t flash_address; /* Flash BIOS address */
[all …]
/linux/drivers/platform/x86/intel/pmt/
H A Dclass.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/io-64-nonatomic-lo-hi.h>
36 return !!(ivdev->quirks & VSEC_QUIRK_EARLY_HW); in intel_pmt_is_early_client_hw()
47 return -EFAULT; in pmt_memcpy64_fromio()
66 if (cb && cb->read_telem) in pmt_telem_read_mmio()
67 return cb->read_telem(pdev, guid, buf, off, count); in pmt_telem_read_mmio()
72 /* PUNIT on SPR only supports aligned 64-bit read */ in pmt_telem_read_mmio()
89 struct intel_pmt_entry *entry = container_of(attr, in intel_pmt_read() local
94 return -EINVAL; in intel_pmt_read()
96 if (off >= entry->size) in intel_pmt_read()
[all …]
/linux/arch/x86/boot/compressed/
H A Didt_64.c1 // SPDX-License-Identifier: GPL-2.0-only
9 unsigned long address = (unsigned long)handler; in set_idt_entry() local
10 gate_desc entry; in set_idt_entry() local
12 memset(&entry, 0, sizeof(entry)); in set_idt_entry()
14 entry.offset_low = (u16)(address & 0xffff); in set_idt_entry()
15 entry.segment = __KERNEL_CS; in set_idt_entry()
16 entry.bits.type = GATE_TRAP; in set_idt_entry()
17 entry.bits.p = 1; in set_idt_entry()
18 entry.offset_middle = (u16)((address >> 16) & 0xffff); in set_idt_entry()
19 entry.offset_high = (u32)(address >> 32); in set_idt_entry()
[all …]
/linux/drivers/md/dm-vdo/indexer/
H A Dchapter-index.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "chapter-index.h"
10 #include "memory-alloc.h"
13 #include "hash-utils.h"
31 memory_size = ((geometry->index_pages_per_chapter + 1) * geometry->bytes_per_page); in uds_make_open_chapter_index()
32 index->geometry = geometry; in uds_make_open_chapter_index()
33 index->volume_nonce = volume_nonce; in uds_make_open_chapter_index()
34 result = uds_initialize_delta_index(&index->delta_index, 1, in uds_make_open_chapter_index()
35 geometry->delta_lists_per_chapter, in uds_make_open_chapter_index()
36 geometry->chapter_mean_delta, in uds_make_open_chapter_index()
[all …]
/linux/Documentation/locking/
H A Drobust-futex-ABI.rst42 The pointer 'head' points to a structure in the threads address space
48 kernel, then it can actually have two such structures - one using 32 bit
58 to itself, 'head'. The last 'lock entry' points back to the 'head'.
61 address of the associated 'lock entry', plus or minus, of what will
62 be called the 'lock word', from that 'lock entry'. The 'lock word'
69 the address of the 'lock entry', during list insertion and removal,
73 Each 'lock entry' on the single linked list starting at 'head' consists
74 of just a single word, pointing to the next 'lock entry', or back to
76 entry', at an offset from the 'lock entry' specified by the 'offset'
83 mechanism to register the address of that 'lock word' with the kernel.
[all …]
/linux/arch/arm/mm/
H A Dproc-arm946.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/arm946.S: utility functions for ARM946E-S
5 * Copyright (C) 2004-2006 Hyok S. Choi (hyok.choi@samsung.com)
7 * (Many of cache codes are from proc-arm926.S)
15 #include <asm/pgtable-hwdef.h>
17 #include "proc-macros.S"
20 * ARM946E-S is synthesizable to have 0KB to 1MB sized D-Cache,
49 bic r0, r0, #0x00001000 @ i-cache
50 bic r0, r0, #0x00000004 @ d-cache
57 * Params : r0 = address to jump to
[all …]
H A Dproc-arm925.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Copyright (C) 2002-2003 MontaVista Software, Inc.
10 * Update for Linux-2.6 and cache flush improvements
13 * hacked for non-paged-MM by Hyok S. Choi, 2004.
18 * CONFIG_CPU_ARM925_CPU_IDLE -> nohlt
20 * Some additional notes based on deciphering the TI TRM on OMAP-5910:
22 * NOTE1: The TI925T Configuration Register bit "D-cache clean and flush
23 * entry mode" must be 0 to flush the entries in both segments
24 * at once. This is the default value. See TRM 2-20 and 2-24 for
27 * NOTE2: Default is the "D-cache clean and flush entry mode". It looks
[all …]
H A Dproc-arm926.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm926.S: MMU functions for ARM926EJ-S
5 * Copyright (C) 1999-2001 ARM Limited
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
12 * CONFIG_CPU_ARM926_CPU_IDLE -> nohlt
20 #include <asm/pgtable-hwdef.h>
23 #include "proc-macros.S"
27 * using the single invalidate entry instructions. Anything larger
121 * address space.
150 * specified address range.
[all …]
/linux/include/soc/fsl/
H A Ddpaa2-fd.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Copyright 2014-2016 Freescale Semiconductor Inc.
14 * DOC: DPAA2 FD - Frame Descriptor APIs for DPAA2
27 * struct dpaa2_fd - Struct describing FDs
29 * @addr: address in the FD
32 * @format_offset: format, offset, and short-length fields
35 * @flc: flow context address
99 * dpaa2_fd_get_addr() - get the addr field of frame descriptor
102 * Return the address in the frame descriptor.
106 return (dma_addr_t)le64_to_cpu(fd->simple.addr); in dpaa2_fd_get_addr()
[all …]
/linux/drivers/net/dsa/microchip/
H A Dksz9477_acl.c1 // SPDX-License-Identifier: GPL-2.0
8 * - Matching Rules: These registers define the criteria for matching incoming
13 * - Action Rules: These registers define how the ACL should modify the packet's
18 * - Processing Rules: These registers control the overall behavior of the ACL,
23 * +----------------------+
24 * +----------------------+ | (optional) |
27 * +----------------------+ +----------------------+
31 * +----------------------+
35 * +----------------------+
38 * +----------------------+
[all …]
/linux/sound/isa/gus/
H A Dgus_mem_proc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 unsigned int address; member
19 static ssize_t snd_gf1_mem_proc_dump(struct snd_info_entry *entry, in snd_gf1_mem_proc_dump() argument
24 struct gus_proc_private *priv = entry->private_data; in snd_gf1_mem_proc_dump()
25 struct snd_gus_card *gus = priv->gus; in snd_gf1_mem_proc_dump()
28 err = snd_gus_dram_read(gus, buf, pos, count, priv->rom); in snd_gf1_mem_proc_dump()
34 static void snd_gf1_mem_proc_free(struct snd_info_entry *entry) in snd_gf1_mem_proc_free() argument
36 struct gus_proc_private *priv = entry->private_data; in snd_gf1_mem_proc_free()
49 struct snd_info_entry *entry; in snd_gf1_mem_proc_init() local
52 if (gus->gf1.mem_alloc.banks_8[idx].size > 0) { in snd_gf1_mem_proc_init()
[all …]
/linux/kernel/dma/
H A Ddebug.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #define pr_fmt(fmt) "DMA-API: " fmt
12 #include <linux/dma-map-ops.h>
32 #define HASH_FN_MASK (HASH_SIZE - 1)
55 * struct dma_debug_entry - track a dma_map* or dma_alloc_coherent mapping
56 * @list: node on pre-allocated free_entries list
58 * @dev_addr: dma address
64 * @paddr: physical start address of the mapping
95 /* List of pre-allocated dma_debug_entry's */
100 /* Global disable flag - will be set in case of an error */
[all …]
/linux/arch/arc/kernel/
H A Dtraps.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Traps/Non-MMU Exception handling for ARC
5 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
8 * -user-space unaligned access emulation
19 #include <asm/entry.h>
25 void die(const char *str, struct pt_regs *regs, unsigned long address) in die() argument
27 show_kernel_fault_diag(str, regs, address); in die()
35 * -for user faults enqueues requested signal
36 * -for kernel, chk if due to copy_(to|from)_user, otherwise die()
45 tsk->thread.fault_address = (__force unsigned int)addr; in unhandled_exception()
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_pt_walk.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 * struct xe_ptw - base class for driver pagetable subclassing.
16 * Drivers could subclass this, and if it's a page-directory, typically
25 * struct xe_pt_walk - Embeddable struct for walk parameters
31 * @shifts: Array of page-table entry shifts used for the
33 * page-shift as the first entry. It's legal for this pointer to be
41 * to the address range and called only for entries that are
42 * shared with other address ranges. Such entries are referred to
51 * typedef xe_pt_entry_fn - gpu page-table-walk callback-function
55 * @addr: The virtual address.
[all …]
/linux/net/appletalk/
H A Daarp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 * Jaume Grau - flush caches on AARP_PROBE
21 * Rob Newberry - Added proxy AARP and AARP proc fs,
23 * Arnaldo C. Melo - don't mangle rx packets
47 * struct aarp_entry - AARP entry
52 * @expires_at: Entry expiry time
53 * @target_addr: DDP Address
55 * @hwaddr: Physical i/f address of target/router
57 * @next: Next entry in chain
87 refcount_inc(&a->refcnt); in aarp_entry_get()
[all …]
/linux/arch/s390/mm/
H A Dgmap_helpers.c1 // SPDX-License-Identifier: GPL-2.0
3 * Helper functions for KVM guest address space mapping code
21 * ptep_zap_softleaf_entry() - discard a software leaf entry.
23 * @entry: the software leaf entry that needs to be zapped
25 * Discards the given software leaf entry. If the leaf entry was an actual
26 * swap entry (and not a migration entry, for example), the actual swapped
29 static void ptep_zap_softleaf_entry(struct mm_struct *mm, softleaf_t entry) in ptep_zap_softleaf_entry() argument
31 if (softleaf_is_swap(entry)) in ptep_zap_softleaf_entry()
33 else if (softleaf_is_migration(entry)) in ptep_zap_softleaf_entry()
34 dec_mm_counter(mm, mm_counter(softleaf_to_folio(entry))); in ptep_zap_softleaf_entry()
[all …]
/linux/scripts/gdb/linux/
H A Dpgtable.py1 # SPDX-License-Identifier: GPL-2.0-only
42 return (bit_start, bit_end), data >> bit_start & ((1 << (1 + bit_end - bit_start)) - 1)
79 {'next entry physical address': <30} {hex(self.next_entry_physical_address)}
80 --
89 __init__(self, address, level) global() argument
[all...]
/linux/drivers/acpi/apei/
H A Dapei-base.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * apei-base.c - ACPI Platform Error Interface (APEI) supporting
33 #include "apei-internal.h"
50 ctx->ins_table = ins_table; in apei_exec_ctx_init()
51 ctx->instructions = instructions; in apei_exec_ctx_init()
52 ctx->action_table = action_table; in apei_exec_ctx_init()
53 ctx->entries = entries; in apei_exec_ctx_init()
57 int __apei_exec_read_register(struct acpi_whea_header *entry, u64 *val) in __apei_exec_read_register() argument
61 rc = apei_read(val, &entry->register_region); in __apei_exec_read_register()
64 *val >>= entry->register_region.bit_offset; in __apei_exec_read_register()
[all …]
/linux/arch/x86/mm/
H A Dpgtable.c1 // SPDX-License-Identifier: GPL-2.0
11 phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
32 * NOTE! For PAE, any changes to the top page-directory-pointer-table in ___pmd_free_tlb()
36 tlb->need_flush_all = 1; in ___pmd_free_tlb()
62 list_add(&ptdesc->pt_list, &pgd_list); in pgd_list_add()
69 list_del(&ptdesc->pt_list); in pgd_list_del()
74 virt_to_ptdesc(pgd)->pt_mm = mm; in pgd_set_mm()
79 return page_ptdesc(page)->pt_mm; in pgd_page_get_mm()
103 * List of all pgd's needed for non-PAE so it can invalidate entries
106 * tactic would be needed. This is essentially codepath-based locking
[all …]

12345678910>>...42