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/linux/drivers/pinctrl/mediatek/
H A Dmtk-eint.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2014-2025 MediaTek Inc.
24 #include "mtk-eint.h"
74 static void __iomem *mtk_eint_get_offset(struct mtk_eint *eint, in mtk_eint_get_offset() argument
78 unsigned int idx = eint->pins[eint_num].index; in mtk_eint_get_offset()
79 unsigned int inst = eint->pins[eint_num].instance; in mtk_eint_get_offset()
82 reg = eint->base[inst] + offset + (idx / 32 * 4); in mtk_eint_get_offset()
87 static unsigned int mtk_eint_can_en_debounce(struct mtk_eint *eint, in mtk_eint_can_en_debounce() argument
91 unsigned int bit = BIT(eint->pins[eint_num].index % 32); in mtk_eint_can_en_debounce()
92 void __iomem *reg = mtk_eint_get_offset(eint, eint_num, in mtk_eint_can_en_debounce()
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H A Dmtk-eint.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2025 MediaTek Inc.
80 /* Used to fit into various EINT device */
92 int mtk_eint_do_init(struct mtk_eint *eint, struct mtk_eint_pin *eint_pin);
93 int mtk_eint_do_suspend(struct mtk_eint *eint);
94 int mtk_eint_do_resume(struct mtk_eint *eint);
95 int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_n,
97 int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n);
100 static inline int mtk_eint_do_init(struct mtk_eint *eint, in mtk_eint_do_init() argument
103 return -EOPNOTSUPP; in mtk_eint_do_init()
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H A Dpinctrl-mtk-common-v2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 MediaTek Inc.
9 #include <dt-bindings/pinctrl/mt65xx.h>
19 #include "mtk-eint.h"
20 #include "pinctrl-mtk-common-v2.h"
23 * struct mtk_drive_desc - the structure that holds the information
30 * formula: output = ((input) / step - 1) * scal
50 writel_relaxed(val, pctl->base[i] + reg); in mtk_w32()
55 return readl_relaxed(pctl->base[i] + reg); in mtk_r32()
63 spin_lock_irqsave(&pctl->lock, flags); in mtk_rmw()
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H A Dpinctrl-mtk-common.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2014 MediaTek Inc.
12 #include <linux/pinctrl/pinconf-generic.h>
14 #include "mtk-eint.h"
37 const struct mtk_desc_eint eint; member
44 .eint = _eint, \
61 #define SET_ADDR(x, y) (x + (y->devdata->port_align))
62 #define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1))
71 * struct mtk_drv_group_desc - Provide driving group data.
96 * struct mtk_pin_drv_grp - Provide each pin driving info.
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt6878-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6878-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 - Igor Belwon <igor.belwon@mentallysanemainliners.org>
18 const: mediatek,mt6878-pinctrl
22 - description: pin controller base
23 - description: bl group IO
24 - description: bm group IO
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/linux/drivers/pinctrl/samsung/
H A Dpinctrl-samsung.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
5 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2012 Linaro Ltd
25 * enum pincfg_type - possible pin configuration types supported.
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
70 * enum pud_index - Possible index values to access the pud_val array.
84 * enum eint_type - possible external interrupt types.
104 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
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H A Dpinctrl-exynos-arm.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Exynos specific support for Samsung pinctrl/gpiolib driver with eint support.
5 // Copyright (c) 2012 Samsung Electronics Co., Ltd.
7 // Copyright (c) 2012 Linaro Ltd
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
49 unsigned int *pud_val = drvdata->pud_val; in s5pv210_pud_value_init()
58 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
75 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
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H A Dpinctrl-exynos-arm64.c1 // SPDX-License-Identifier: GPL-2.0+
4 // with eint support.
6 // Copyright (c) 2012 Samsung Electronics Co., Ltd.
8 // Copyright (c) 2012 Linaro Ltd
10 // Copyright (c) 2017 Krzysztof Kozlowski <krzk@kernel.org>
17 #include <linux/soc/samsung/exynos-regs-pmu.h>
19 #include "pinctrl-samsung.h"
20 #include "pinctrl-exynos.h"
53 * Bank type for non-alive type. Bit fields:
71 * Bank type for non-alive type. Bit fields:
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H A Dpinctrl-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0+
3 // S3C64xx specific support for pinctrl-samsung driver.
5 // Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
7 // Based on pinctrl-exynos.c, please see the file for original copyrights.
24 #include "pinctrl-samsung.h"
116 .eint_mask = (1 << (pins)) - 1, \
140 .eint_mask = (1 << (pins)) - 1, \
194 .eint_mask = (1 << (pins)) - 1, \
200 * struct s3c64xx_eint0_data - EINT0 common data
212 * struct s3c64xx_eint0_domain_data - EINT0 per-domain data
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H A Dpinctrl-exynos.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Exynos specific support for Samsung pinctrl/gpiolib driver with eint support.
5 // Copyright (c) 2012 Samsung Electronics Co., Ltd.
7 // Copyright (c) 2012 Linaro Ltd
29 #include <linux/soc/samsung/exynos-pmu.h>
30 #include <linux/soc/samsung/exynos-regs-pmu.h>
32 #include "pinctrl-samsung.h"
33 #include "pinctrl-exynos.h"
67 if (bank->eint_mask_offset) in exynos_irq_mask()
68 reg_mask = bank->pctl_offset + bank->eint_mask_offset; in exynos_irq_mask()
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/linux/sound/soc/codecs/
H A Dmt6359-accdet.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6359-accdet.c -- ALSA SoC mt6359 accdet driver
5 // Copyright (C) 2021 MediaTek Inc.
27 #include "mt6359-accdet.h"
31 #define REGISTER_VAL(x) ((x) - 1)
73 if (priv->data->eint_detect_mode == 0x3 || in adjust_eint_analog_setting()
74 priv->data->eint_detect_mode == 0x4) { in adjust_eint_analog_setting()
76 regmap_update_bits(priv->regmap, in adjust_eint_analog_setting()
79 if (priv->data->eint_detect_mode == 0x4) { in adjust_eint_analog_setting()
80 if (priv->caps & ACCDET_PMIC_EINT0) { in adjust_eint_analog_setting()
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/linux/arch/sparc/include/asm/
H A Decc.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
22 * ----------------------------------------
24 * ----------------------------------------
40 * -----------------------------
41 * | RESV | ECHECK | EINT |
42 * -----------------------------
46 * EINT: Enable Interrupts for correctable errors. 0=off 1=on
53 * -----------------------------------------------------
54 * | MID | S | RSV | VA | BM |AT| C| SZ |TYP| PADDR |
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos990.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
5 * Copyright (c) 2024, Igor Belwon <igor.belwon@mentallysanemainliners.org>
8 #include <dt-bindings/clock/samsung,exynos990.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <1>;
16 interrupt-parent = <&gic>;
29 #address-cells = <1>;
30 #size-cells = <0>;
32 cpu-map {
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H A Dexynos850.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018 Samsung Electronics Co., Ltd.
6 * Copyright (C) 2021 Linaro Ltd.
13 #include <dt-bindings/clock/exynos850.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/samsung,exynos-usi.h>
20 #address-cells = <2>;
21 #size-cells = <1>;
23 interrupt-parent = <&gic>;
34 arm-pmu {
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H A Dexynos7885.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2021 Dávid Virág
9 #include <dt-bindings/clock/exynos7885.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <1>;
17 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
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H A Dexynos7870.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2015 Samsung Electronics Co., Ltd.
6 * Copyright (c) 2025 Kaustabh Chakraborty <kauschluss@disroot.org>
9 #include <dt-bindings/clock/samsung,exynos7870-cmu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <1>;
17 interrupt-parent = <&gic>;
31 #address-cells = <1>;
32 #size-cells = <0>;
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H A Dexynosautov9.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
9 #include <dt-bindings/clock/samsung,exynosautov9.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,boot-mode.h>
12 #include <dt-bindings/soc/samsung,exynos-usi.h>
16 #address-cells = <2>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
31 arm-pmu {
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/linux/arch/arm/boot/dts/samsung/
H A Ds3c64xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
37 compatible = "arm,arm1176jzf-s";
43 compatible = "simple-bus";
44 #address-cells = <1>;
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H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
20 #include "exynos4-cpu-thermal.dtsi"
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
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H A Dexynos5260.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
9 #include <dt-bindings/clock/exynos5260-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
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/linux/drivers/usb/host/
H A Dxhci-ext-caps.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2008 Intel Corp.
13 /* HC not running - set to 1 when run/stop bit is cleared. */
28 /* bits 7:0 - how long is the Capabilities register */
35 /* Extended capability IDs - ID 0 reserved */
41 /* IDs 6-9 reserved */
46 /* USB Legacy Support Capability - section 7.1.1 */
50 /* USB Legacy Support Capability - section 7.1.1 */
54 /* USB Legacy Support Control and Status Register - section 7.1.2 */
61 /* USB 2.0 xHCI 0.96 L1C capability - section 7.2.2.1.3.2 */
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/linux/arch/arm/boot/dts/mediatek/
H A Dmt8135.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Joe.C <yingjoe.chen@mediatek.com>
8 #include <dt-bindings/clock/mt8135-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/mt8135-resets.h>
12 #include <dt-bindings/pinctrl/mt8135-pinfunc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
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H A Dmt7629.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019 MediaTek Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/mt7629-clk.h>
11 #include <dt-bindings/power/mt7622-power.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/mt7629-resets.h>
18 interrupt-parent = <&sysirq>;
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/linux/arch/arm/mach-s3c/
H A Dmach-crag6410.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/input-event-codes.h>
33 #include <linux/platform_data/s3c-hsotg.h>
43 #include <asm/mach-types.h>
47 #include "regs-gpio.h"
48 #include "gpio-samsung.h"
53 #include "gpio-cfg.h"
54 #include <linux/platform_data/spi-s3c64xx.h>
59 #include <linux/platform_data/i2c-s3c2410.h>
64 #include "regs-gpio-memport-s3c64xx.h"
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H A Ds3c64xx.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011 Samsung Electronics Co., Ltd.
29 #include <linux/dma-mapping.h>
31 #include <linux/irqchip/arm-vic.h>
40 #include "regs-gpio.h"
41 #include "gpio-samsung.h"
46 #include "gpio-cfg.h"
47 #include "pwm-core.h"
48 #include "regs-irqtype.h"
50 #include "irq-uart-s3c64xx.h"
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