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/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddra7-atl.txt7 signals - can compensate the drift between the two ws signal.
12 Clock tree binding:
13 This binding uses the common clock binding[1].
14 To be able to integrate the ATL clocks with DT clock tree.
16 Since the clock instances are part of a single IP this binding is used as a node
17 for the DT clock tree, the IP driver is needed to handle the actual configuration
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
23 - compatible : shall be "ti,dra7-atl-clock"
24 - #clock-cells : from common clock binding; shall be set to 0.
25 - clocks : link phandles to functional clock of ATL
[all …]
/linux/Documentation/devicetree/bindings/reset/
H A Dreset.txt3 This binding is intended to represent the hardware reset signals present
10 reset consumer (the module being reset, or a module managing when a sub-
11 ordinate module is reset). This binding exists to represent the provider and
15 specifier - a list of DT cells that represents the reset signal within the
17 are dictated by the binding of the reset provider, although common schemes
23 the DT node of each affected HW block, since if activated, an unrelated block
24 may be reset. Instead, reset signals should be represented in the DT node
27 block node for dedicated reset signals. The intent of this binding is to give
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
[all …]
H A Dsnps,hsdk-reset.txt1 Binding for the Synopsys HSDK reset controller
3 This binding uses the common reset binding[1].
8 - compatible: should be "snps,hsdk-reset".
9 - reg: should always contain 2 pairs address - length: first for reset
12 - #reset-cells: from common reset binding; Should always be set to 1.
16 compatible = "snps,hsdk-reset";
17 #reset-cells = <1>;
28 The index could be found in <dt-bindings/reset/snps,hsdk-reset.h>
/linux/Documentation/devicetree/bindings/thermal/
H A Dmax77620_thermal.txt10 -------------------
11 #thermal-sensor-cells: For more details, please refer to
12 <devicetree/bindings/thermal/thermal-sensor.yaml>
15 For more details, please refer generic thermal DT binding document
18 Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
22 --------
23 #include <dt-bindings/mfd/max77620.h>
24 #include <dt-bindings/thermal/thermal.h>
31 #thermal-sensor-cells = <0>;
36 cool_dev: cool-dev {
[all …]
H A Dthermal-cooling-devices.yaml1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
20 - thermal-sensor: device that measures temperature, has SoC-specific bindings
21 - cooling-device: device used to dissipate heat either passively or actively
22 - thermal-zones: a container of the following node types used to describe all
25 This binding describes the cooling devices.
28 - Passive cooling: by means of regulating device performance. A typical
[all …]
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,padding.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
24 - enum:
25 - mediatek,mt8188-disp-padding
26 - mediatek,mt8195-mdp3-padding
27 - items:
[all …]
/linux/Documentation/devicetree/bindings/
H A DABI.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Devicetree (DT) ABI
7 I. Regarding stable bindings/ABI, we quote from the 2013 ARM mini-summit
10 "That still leaves the question of, what does a stable binding look
11 like? Certainly a stable binding means that a newer kernel will not
12 break on an older device tree, but that doesn't mean the binding is
15 then default to the previous behaviour if it is missing. If a binding
21 II. General binding rules
24 binding because it isn't perfect.
30 the old binding. ie. add additional properties, but don't change the
/linux/Documentation/devicetree/bindings/clock/
H A Dclk-palmas-clk32kg-clocks.txt5 This binding uses the common clock binding ./clock-bindings.txt.
8 - compatible : "ti,palmas-clk32kg" for clk32kg clock
9 "ti,palmas-clk32kgaudio" for clk32kgaudio clock
10 - #clock-cells : shall be set to 0.
13 - ti,external-sleep-control: The external enable input pins controlled the
22 dt-bindings/mfd/palmas.h
25 #include <dt-bindings/mfd/palmas.h>
30 compatible = "ti,palmas-clk32kg";
31 #clock-cells = <0>;
32 ti,external-sleep-control = <PALMAS_EXT_CONTROL_PIN_NSLEEP>;
H A Dbaikal,bt1-ccu-div.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 Clock Control Unit Dividers
11 - Serge Semin <fancer.lancer@gmail.com>
14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
18 IP-blocks or to groups of blocks (clock domains). The transformation is done
19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
20 later ones are described in this binding. Each clock domain can be also
[all …]
H A Dimg,boston-clock.txt1 Binding for Imagination Technologies MIPS Boston clock sources.
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
11 - compatible : Should be "img,boston-clock".
12 - #clock-cells : Should be set to 1.
14 <dt-bindings/clock/boston-clock.h>
18 system-controller@17ffd000 {
19 compatible = "img,boston-platform-regs", "syscon";
23 compatible = "img,boston-clock";
24 #clock-cells = <1>;
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
21 This binding document describes the binding for the clock portion of the
24 Also see these documents for generic binding information:
25 [1] Clock : ../clock/clock-bindings.txt
28 [2] include/dt-bindings/clock/lochnagar.h
30 This binding must be part of the Lochnagar MFD binding:
[all …]
H A Dfsl,scu-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Clock Controller Based on SCU Message Protocol
10 - Abel Vesa <abel.vesa@nxp.com>
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
14 This binding uses the common clock binding.
15 (Documentation/devicetree/bindings/clock/clock-bindings.txt)
18 include/dt-bindings/clock/imx8qxp-clock.h
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dmax77620.txt4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8192-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
23 Number of cells in GPIO specifier. Since the generic GPIO binding is used,
25 binding representation for description of particular cells.
[all …]
H A Dnvidia,tegra124-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The Tegra124 pinctrl binding is very similar to the Tegra20 and
14 Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and
15 nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a
21 - const: nvidia,tegra124-pinmux
[all …]
H A Dpinmux-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinmux-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The contents of the pin configuration child nodes are defined by the binding
18 the binding for the individual pin controller device.
44 Optionally an alternative binding can be used if more suitable depending on the
50 For cases like this, the pin controller driver may use pinctrl-pin-array helper
51 binding with a hardware based index and a number of pin configuration values:
[all …]
H A Dnvidia,tegra124-xusb-padctl.txt1 Device tree binding for NVIDIA Tegra XUSB pad controller
4 NOTE: It turns out that this binding isn't an accurate description of the XUSB
7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt.
8 The binding described in this file is deprecated and should not be used.
14 This document defines the device-specific binding for the XUSB pad controller.
16 Refer to pinctrl-bindings.txt in this directory for generic information about
17 pin controller device tree bindings and ../phy/phy-bindings.txt for details on
21 --------------------
22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
[all …]
H A Dqcom,pmic-mpp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-mpp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC Multi-Purpose Pin (MPP) block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the MPP block(s) found in the 8xxx series of
19 - items:
20 - enum:
21 - qcom,pm8019-mpp
[all …]
H A Dmediatek,mt6779-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Teng <andy.teng@mediatek.com>
11 - Sean Wang <sean.wang@kernel.org>
20 - mediatek,mt6779-pinctrl
21 - mediatek,mt6797-pinctrl
26 reg-names: true
28 gpio-controller: true
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dsnps,dwc-qos-ethernet.txt3 This binding is deprecated, but it continues to be supported, but new
4 features should be preferably added to the stmmac binding document.
6 This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
21 compatible with earlier revisions of this binding.
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 management, and reset control tasks from the CPU. The binding document
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
[all …]
/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dti,bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Lechner <david@lechnology.com>
13 This documents the binding structure and common properties for serial
15 binding:
27 This bindings follows the UART slave device binding in ../serial/serial.yaml.
32 - ti,cc2560
33 - ti,wl1271-st
34 - ti,wl1273-st
[all …]
/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-mipi-dbi-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Noralf Trønnes <noralf@tronnes.org>
13 This binding is for display panels using a MIPI DBI compatible controller
18 phones. The standard defines 4 display architecture types and this binding is
23 - Power:
24 - Vdd: Power supply for display module
25 Called power-supply in this binding.
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra186-bpmp-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 binding describes an I2C bus that is accessed in such a fashion.
21 See ../firmware/nvidia,tegra186-bpmp.yaml for details of the BPMP
22 binding.
28 const: nvidia,tegra186-bpmp-i2c
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Dolpc,xo1.75-ec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/misc/olpc,xo1.75-ec.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: OLPC XO-1.75 Embedded Controller
11 This binding describes the Embedded Controller acting as a SPI bus master
12 on a OLPC XO-1.75 laptop computer.
17 "ready-gpios" property of the SSP binding as documented in:
18 <Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml>.
21 - Lubomir Rintel <lkundrak@v3.sk>
[all …]

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