Searched +full:dsb +full:- +full:element +full:- +full:bits (Results 1 – 13 of 13) sorted by relevance
| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | qcom,coresight-tpdm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Trace, Profiling and Diagnostics Monitor - TPDM 13 Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete 14 Single Bit (DSB). It performs data collection in the data producing clock 22 - Mao Jinlong <quic_jinlmao@quicinc.com> 23 - Tao Zhang <quic_taozha@quicinc.com> 31 - qcom,coresight-tpdm [all …]
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| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-tpda.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 13 /* Aggregator port CMB data set element size bit */ 15 /* Aggregator port DSB data set element size bit */ 20 /* Bits 6 ~ 12 is for atid value */ 24 * struct tpda_drvdata - specifics associated to an TPDA component 30 * @dsb_esize Record the DSB element size. 31 * @cmb_esize Record the CMB element size.
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| H A D | coresight-tpda.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. 18 #include "coresight-priv.h" 19 #include "coresight-tpda.h" 20 #include "coresight-trace-id.h" 21 #include "coresight-tpdm.h" 27 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in tpda_clear_element_size() 29 drvdata->dsb_esize = 0; in tpda_clear_element_size() 30 drvdata->cmb_esize = 0; in tpda_clear_element_size() 38 if (drvdata->dsb_esize == 64) in tpda_set_element_size() [all …]
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| H A D | coresight-tpdm.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. 10 #include <linux/coresight-pmu.h> 19 #include "coresight-priv.h" 20 #include "coresight-tpdm.h" 26 return (drvdata->datasets & TPDM_PIDR0_DS_DSB); in tpdm_has_dsb_dataset() 31 return (drvdata->datasets & TPDM_PIDR0_DS_CMB); in tpdm_has_cmb_dataset() 36 return (drvdata->datasets & TPDM_PIDR0_DS_MCMB); in tpdm_has_mcmb_dataset() 44 struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); in tpdm_simple_dataset_show() 48 switch (tpdm_attr->mem) { in tpdm_simple_dataset_show() [all …]
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| H A D | coresight-etm4x-core.c | 1 // SPDX-License-Identifier: GPL-2.0 27 #include <linux/coresight-pmu.h> 35 #include <linux/clk/clk-conf.h> 43 #include "coresight-etm4x.h" 44 #include "coresight-etm-perf.h" 45 #include "coresight-etm4x-cfg.h" 46 #include "coresight-self-hosted-trace.h" 47 #include "coresight-syscfg.h" 48 #include "coresight-trace-id.h" 54 #define PARAM_PM_SAVE_FIRMWARE 0 /* save self-hosted state as per firmware */ [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | monaco.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,qcs8300-gcc.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/clock/qcom,sa8775p-camcc.h> 9 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> 10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 11 #include <dt-bindings/clock/qcom,sa8775p-videocc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/firmware/qcom,scm.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> [all …]
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| H A D | talos.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,qcs615-camcc.h> 8 #include <dt-bindings/clock/qcom,qcs615-dispcc.h> 9 #include <dt-bindings/clock/qcom,qcs615-gcc.h> 10 #include <dt-bindings/clock/qcom,qcs615-gpucc.h> 11 #include <dt-bindings/clock/qcom,qcs615-videocc.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> [all …]
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| H A D | hamoa.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h> 8 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 9 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h> 10 #include <dt-bindings/clock/qcom,x1e80100-gcc.h> 11 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h> 12 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> [all …]
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| H A D | lemans.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/interconnect/qcom,icc.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> 12 #include <dt-bindings/clock/qcom,sa8775p-gcc.h> 13 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 14 #include <dt-bindings/clock/qcom,sa8775p-videocc.h> 15 #include <dt-bindings/clock/qcom,sa8775p-camcc.h> [all …]
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| H A D | kodiak.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/clock/qcom,camcc-sc7280.h> 8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h> 9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 10 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 11 #include <dt-bindings/clock/qcom,gpucc-sc7280.h> 12 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> 13 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> 14 #include <dt-bindings/clock/qcom,rpmh.h> [all …]
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| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_reg.h | 3 * Copyright (c) 2007-2013 Broadcom Corporation 12 * by size in bits. For example [RW 32]. The access types are: 13 * R - Read only 14 * RC - Clear on read 15 * RW - Read/Write 16 * ST - Statistics register (clear on read) 17 * W - Write only 18 * WB - Wide bus register - the size is over 32 bits and it should be 19 * read/write in consecutive 32 bits accesses 20 * WR - Write Clear (write 1 to clear the bit) [all …]
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| H A D | bnx2x_main.c | 3 * Copyright (c) 2007-2013 Broadcom Corporation 36 #include <linux/dma-mapping.h> 83 #define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw" 84 #define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw" 85 #define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw" 86 #define FW_FILE_NAME_E1_V15 "bnx2x/bnx2x-e1-" FW_FILE_VERSION_V1 [all...] |
| /linux/drivers/irqchip/ |
| H A D | irq-gic-v3-its.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 37 #include <linux/irqchip/arm-gic-v3.h> 38 #include <linux/irqchip/arm-gic-v4.h> 43 #include "irq-gic-common.h" 44 #include "irq-gic-its-msi-parent.h" 45 #include <linux/irqchip/irq-msi-lib.h> 62 * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 72 * Collection structure - just an ID, and a redistributor address to 82 * The ITS_BASER structure - contains memory information, cached [all …]
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