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/freebsd/sys/dev/gpio/
H A Dgpioregulator.c1 /*-
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
38 #include <dev/ofw/ofw_bus.h>
39 #include <dev/ofw/ofw_bus_subr.h>
41 #include <dev/gpio/gpiobusvar.h>
43 #include <dev/regulator/regulator.h>
60 struct gpiobus_pin **pins; member
71 device_t dev; member
84 if (sc->def->enable_pin_valid == 1) { in gpioregulator_regnode_init()
85 error = gpio_pin_setflags(sc->def->enable_pin, GPIO_PIN_OUTPUT); in gpioregulator_regnode_init()
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H A Dgpiobus.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
41 #include <dev/gpio/gpiobusvar.h>
78 * low-level controller driver in struct gpio_pin. Currently, only pins
80 * the FDT properties. In theory, these flags are defined per-platform. In
81 * practice they are always the flags from the dt-bindings/gpio/gpio.h file.
82 * The only one of those flags we currently support is for handling active-low
83 * pins, so we just define that flag here instead of including a GPL'd header.
88 * XXX -> Move me to better place - gpio_subr.c?
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H A Dgpiobusvar.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
40 #include <dev/ofw/ofw_bus_subr.h>
51 &((struct ofw_gpiobus_devinfo *)device_get_ivars(d))->opd_dinfo
56 #define GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
57 #define GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
58 #define GPIOBUS_LOCK_INIT(_sc) mtx_init(&_sc->sc_mtx, \
59 device_get_nameunit(_sc->sc_dev), "gpiobus", MTX_DEF)
60 #define GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx)
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/freebsd/sys/arm/freescale/imx/
H A Dimx_i2c.c1 /*-
2 * Copyright (C) 2008-2009 Semihalf, Michal Hajduk
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 * Note that the hardware is capable of running as both a master and a slave.
36 * This driver currently implements only master-mode operations.
38 * This driver supports multi-master i2c buses, by detecting bus arbitration
41 * transfer cycles resulting in arbitration loss in mid-transfer. The caller
42 * must handle retries in a way that makes sense for the slave being addressed.
61 #include <dev/iicbus/iiconf.h>
62 #include <dev/iicbus/iicbus.h>
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H A Dimx_spi.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * Driver for imx Enhanced Configurable SPI; master-mode only.
50 #include <dev/gpio/gpiobusvar.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
53 #include <dev/ofw/openfirm.h>
54 #include <dev/spibus/spi.h>
55 #include <dev/spibus/spibusvar.h>
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H A Dimx_gpio.c1 /*-
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
52 #include <dev/gpio/gpiobusvar.h>
53 #include <dev/ofw/openfirm.h>
54 #include <dev/ofw/ofw_bus.h>
55 #include <dev/ofw/ofw_bus_subr.h>
62 #include <dev/clk/clk.h>
72 bus_space_write_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r), (_v))
74 bus_space_read_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r))
115 device_t dev; member
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/freebsd/share/man/man9/
H A Dfdt_pinctrl.91 .\" -*- nroff -*-
20 .\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
53 function to register itself as a pinmux controller.
56 is used to walk the device tree and configure pins specified by the pinctrl-0
57 property for all active devices.
62 If a client device requires a pin configuration change at some
72 to request a pin configuration
73 described by the pinctrl-N property with index
83 registers a pinctrl driver so that it can be used by other devices which call
88 a property with the name given in
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/freebsd/share/man/man4/man4.i386/
H A DCPU_ELAN.41 .\" Copyright (c) 2003 Poul-Henning Kamp <phk@FreeBSD.org>
15 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 .Bl -item -compact
47 A device
48 .Pa /dev/elan-mmcr
58 A timecounter named
71 enables configuration of the GPIO pins of the CPU.
73 A
74 .Ql -
76 A
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dsamsung-pinctrl.txt3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
4 controller. It controls the input/output settings on the available pads/pins
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
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/freebsd/sys/dev/iicbus/mux/
H A Diic_gpiomux.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * Driver for i2c bus muxes controlled by one or more gpio pins.
45 #include <dev/gpio/gpiobusvar.h>
47 #include <dev/iicbus/iicbus.h>
48 #include <dev/iicbus/mux/iicmux.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
53 #include <dev/ofw/openfirm.h>
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/freebsd/sys/arm64/nvidia/tegra210/
H A Dmax77620_gpio.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
38 #include <dev/fdt/fdt_common.h>
39 #include <dev/gpio/gpiobusvar.h>
47 #define GPIO_LOCK(_sc) sx_slock(&(_sc)->gpio_lock)
48 #define GPIO_UNLOCK(_sc) sx_unlock(&(_sc)->gpio_lock)
49 #define GPIO_ASSERT(_sc) sx_assert(&(_sc)->gpio_lock, SA_LOCKED)
71 {"bias-pull-up", CFG_BIAS_PULL_UP},
72 {"bias-pull-down", CFG_BIAS_PULL_DOWN},
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/freebsd/share/man/man4/man4.arm/
H A Dam335x_dmtpps.417 .\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
42 device driver provides a system time counter that includes precise
47 driver may be compiled into the kernel or loaded as a module.
53 The time counter runs at 24Mhz, providing a measurement resolution
59 .Pa /dev/dmtpps
61 .Pa /dev/pps0
66 to configure a type 22 (ATOM) refclock.
69 The AM335x hardware provides four timer devices with a capture input
71 Because it also provides the active system time counter,
74 driver can be active at a time.
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/freebsd/sys/x86/x86/
H A Dio_apic.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
68 * APIC has a contiguous chunk of the System Interrupt address space.
69 * We assume that IRQs 1 - 15 behave like ISA IRQs and that all other
72 * configuration of individual pins as indicated by their tables.
165 if (src->io_edgetrigger) in _ioapic_eoi_source()
167 io = (struct ioapic *)isrc->is_pic; in _ioapic_eoi_source()
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/freebsd/sys/arm/broadcom/bcm2835/
H A Dbcm2835_gpio.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2012-2015 Luiz Otavio O Souza <loos@FreeBSD.org>
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 #include <dev/fdt/fdt_pinctrl.h>
50 #include <dev/gpio/gpiobusvar.h>
51 #include <dev/ofw/ofw_bus.h>
96 { -1, 0, 0 }
135 #define BCM_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
136 #define BCM_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
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/freebsd/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini-dlink-dns-313.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/thermal/thermal.h>
13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
14 compatible = "dlink,dns-313", "cortina,gemini";
15 #address-cells = <1>;
16 #size-cells = <1>;
19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
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H A Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
23 bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
24 stdout-path = "uart0:19200n8";
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H A Dgemini-sq201.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
23 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
29 * The decompressor and also some bootloaders rely on a
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H A Dtegra114-asus-tf701t.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
13 chassis-type = "convertible";
29 trusted-foundations {
30 compatible = "tlm,trusted-foundations";
31 tlm,version-major = <2>;
32 tlm,version-minor = <8>;
40 reserved-memory {
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra210-smaug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
25 stdout-path = "serial0:115200n8";
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
34 bootargs = "root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
35 stdout-path = "serial2:115200n8";
39 fixed-rat
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/freebsd/sys/arm/ti/
H A Dti_gpio.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * Beware that the OMAP4 datasheet(s) lists GPIO banks 1-6, whereas the code
32 * here uses 0-5.
60 #include <dev/gpio/gpiobusvar.h>
61 #include <dev/ofw/openfirm.h>
62 #include <dev/ofw/ofw_bus.h>
63 #include <dev/ofw/ofw_bus_subr.h>
78 #define TI_GPIO_IRQSTATUS_0 0x002C /* writing a 0 has no effect */
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/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8026-samsung-milletwifi.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/power/summit,smb347-charger.h>
11 #include "qcom-msm8226.dtsi"
14 /delete-node/ &adsp_region;
15 /delete-node/ &smem_region;
18 model = "Samsung Galaxy Tab 4 8.0 Wi-Fi";
20 chassis-type = "tablet";
29 #address-cells = <1>;
[all …]
/freebsd/sys/dev/qcom_qup/
H A Dqcom_spi.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 #include <dev/fdt/fdt_common.h>
50 #include <dev/fdt/fdt_pinctrl.h>
52 #include <dev/gpio/gpiobusvar.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
56 #include <dev/clk/clk.h>
57 #include <dev/hwreset/hwreset.h>
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/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipc.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
15 * redistribution must be conditioned upon including a substantially
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
36 #include <dev/bhnd/bhnd.h>
37 #include <dev/bhnd/nvram/bhnd_nvram.h>
45 CHIPC_FLASH_NONE = 0, /**< No flash, or a type unrecognized
47 CHIPC_PFLASH_CFI = 1, /**< CFI-compatible parallel flash */
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