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/linux/tools/testing/selftests/proc/
H A Dproc-subset-pid.c17 * Test that "mount -t proc -o subset=pid" hides everything but pids,
18 * /proc/self and /proc/thread-self.
21 #include <assert.h>
42 if (unshare(CLONE_NEWNS) == -1) { in make_private_proc()
48 if (mount(NULL, "/", NULL, MS_PRIVATE|MS_REC, NULL) == -1) { in make_private_proc()
51 if (mount(NULL, "/proc", "proc", 0, "subset=pid") == -1) { in make_private_proc()
78 assert(d); in main()
80 struct dirent *de; in main() local
87 while ((de = readdir(d))) { in main()
88 if (streq(de->d_name, ".")) { in main()
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H A Dread.c21 // 5) write to /proc/sysrq-trigger
23 #include <assert.h>
46 if (fd == -1) in f_reg()
51 assert((0 <= rv && rv <= sizeof(buf)) || rv == -1); in f_reg()
61 if (fd == -1) in f_reg_write()
64 assert((0 <= rv && rv <= len) || rv == -1); in f_reg_write()
74 assert((0 <= rv && rv <= sizeof(buf)) || rv == -1); in f_lnk()
79 struct dirent *de; in f() local
81 de = xreaddir(d); in f()
82 assert(de->d_type == DT_DIR); in f()
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H A Dfd-001-lookup.c19 #include <assert.h>
32 /* lstat(2) has more "coverage" in case non-symlink pops up somehow. */
40 assert(rv == 0); in test_lookup_pass()
41 assert(S_ISLNK(st.st_mode)); in test_lookup_pass()
50 assert(rv == -1 && errno == ENOENT); in test_lookup_fail()
83 for (i = -1024; i < 0; i++) { in test_lookup()
87 for (u = INT_MAX - 1024; u <= (unsigned int)INT_MAX + 1024; u++) { in test_lookup()
91 for (u = UINT_MAX - 1024; u != 0; u++) { in test_lookup()
101 struct dirent *de; in main() local
104 if (unshare(CLONE_FILES) == -1) in main()
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H A Dfd-003-kthread.c20 #include <assert.h>
38 * Return -1 if a process is userspace process.
49 if (dir_fd == -1) in kernel_thread_fd()
50 return -1; in kernel_thread_fd()
57 if (fd == -1) { in kernel_thread_fd()
59 return -1; in kernel_thread_fd()
68 assert(buf[rv - 1] == '\n'); in kernel_thread_fd()
69 buf[rv - 1] = '\0'; in kernel_thread_fd()
71 /* Search backwards: ->comm can contain whitespace and ')'. */ in kernel_thread_fd()
74 assert(p); in kernel_thread_fd()
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/linux/arch/sparc/include/asm/
H A Dbbc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
12 /* Register sizes are indicated by "B" (Byte, 1-byte),
13 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
28 #define BBC_ES_ACT 0x10 /* [W] E* Assert Change Time */
29 #define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */
30 #define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */
31 #define BBC_ES_ABT 0x16 /* [H] E* Assert Bypass Time */
38 #define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */
39 #define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
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/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_phy_8x60.c1 // SPDX-License-Identifier: GPL-2.0-only
14 /* De-serializer delay D/C for non-lbk mode: */ in hdmi_phy_8x60_powerup()
56 /* Write to HIGH after PLL power down de-assert: */ in hdmi_phy_8x60_powerup()
64 * Enable the re-time logic in hdmi_phy_8x60_powerup()
97 /* Assert RESET PHY from controller */ in hdmi_phy_8x60_powerdown()
101 /* De-assert RESET PHY from controller */ in hdmi_phy_8x60_powerdown()
113 /* Power down PHY, but keep RX-sense: */ in hdmi_phy_8x60_powerdown()
126 "core-vdda",
/linux/include/sound/
H A Dcs4271.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 * line is de-asserted. That also means that clocks cannot be changed
18 * a complete re-initialization of all registers.
20 * One (undocumented) workaround is to assert and de-assert the PDN bit
/linux/drivers/usb/misc/
H A Demi26.c1 // SPDX-License-Identifier: GPL-2.0
18 #define EMI26_VENDOR_ID 0x086a /* Emagic Soft-und Hardware GmBH */
26 #define CPUCS_REG 0x7F92 /* EZ-USB Control and Status Register. Bit 0 controls 8051 reset */
46 dev_err(&dev->dev, "kmalloc(%d) failed.\n", length); in emi26_writememory()
47 return -ENOMEM; in emi26_writememory()
60 dev_info(&dev->dev, "%s - %d\n", __func__, reset_bit); in emi26_set_reset()
61 /* printk(KERN_DEBUG "%s - %d", __func__, reset_bit); */ in emi26_set_reset()
64 dev_err(&dev->dev, "set_reset (%d) failed\n", reset_bit); in emi26_set_reset()
77 int err = -ENOMEM; in emi26_load_firmware()
86 err = request_ihex_firmware(&loader_fw, "emi26/loader.fw", &dev->dev); in emi26_load_firmware()
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H A Demi62.c1 // SPDX-License-Identifier: GPL-2.0
28 #define EMI62_VENDOR_ID 0x086a /* Emagic Soft-und Hardware GmBH */
35 #define CPUCS_REG 0x7F92 /* EZ-USB Control and Status Register. Bit 0 controls 8051 reset */
55 dev_err(&dev->dev, "kmalloc(%d) failed.\n", length); in emi62_writememory()
56 return -ENOMEM; in emi62_writememory()
69 dev_info(&dev->dev, "%s - %d\n", __func__, reset_bit); in emi62_set_reset()
73 dev_err(&dev->dev, "set_reset (%d) failed\n", reset_bit); in emi62_set_reset()
85 int err = -ENOMEM; in emi62_load_firmware()
90 dev_dbg(&dev->dev, "load_firmware\n"); in emi62_load_firmware()
95 err = request_ihex_firmware(&loader_fw, "emi62/loader.fw", &dev->dev); in emi62_load_firmware()
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/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs4271.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
11 - Nikita Shubin <nikita.shubin@maquefel.me>
18 - $ref: dai-common.yaml#
19 - $ref: /schemas/spi/spi-peripheral-props.yaml#
28 spi-cpha: true
30 spi-cpol: true
32 '#sound-dai-cells':
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/linux/sound/soc/sunxi/
H A Dsun8i-adda-pr-regmap.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
15 #include "sun8i-adda-pr-regmap.h"
34 /* De-assert reset */ in adda_reg_read()
57 /* De-assert reset */ in adda_reg_write()
82 .name = "adda-pr",
102 MODULE_ALIAS("platform:sunxi-adda-pr");
/linux/Documentation/misc-devices/
H A Dspear-pcie-gadget.rst1 .. SPDX-License-Identifier: GPL-2.0
37 -----------------------
53 ------------------------
61 inta write 1 to assert INTA and 0 to de-assert.
83 #mount -t configfs none /Config
134 To assert INTA::
138 To de-assert INTA::
170 # cd -
/linux/arch/arm/mach-sunxi/
H A Dmc_smp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
7 * arch/arm/mach-sunxi/mc_smp.c
9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and
10 * arch/arm/mach-hisi/platmcpm.c
14 #include <linux/arm-cci.h>
19 #include <linux/irqchip/arm-gic.h>
70 /* R_CPUCFG registers, specific to sun8i-a83t */
110 is_compatible = of_device_is_compatible(node, "arm,cortex-a15"); in sunxi_core_is_cortex_a15()
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/linux/drivers/reset/
H A Dreset-lantiq.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
7 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
13 #include <linux/reset-controller.h>
43 ret = regmap_read(priv->regmap, priv->status_offset, &val); in lantiq_rcu_reset_status()
51 unsigned long id, bool assert) in lantiq_rcu_reset_status_timeout() argument
60 if (ret == assert) in lantiq_rcu_reset_status_timeout()
63 } while (--retry); in lantiq_rcu_reset_status_timeout()
65 return -ETIMEDOUT; in lantiq_rcu_reset_status_timeout()
69 unsigned long id, bool assert) in lantiq_rcu_reset_update() argument
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H A Dreset-ti-syscon.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/reset/ti-syscon.h>
20 * struct ti_syscon_reset_control - reset control structure
21 * @assert_offset: reset assert control register offset from syscon base
22 * @assert_bit: reset assert bit in the reset assert control register
27 * @flags: reset flag indicating how the (de)assert and status are handled
40 * struct ti_syscon_reset_data - reset controller information structure
42 * @regmap: regmap handle containing the memory-mapped reset registers
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/linux/arch/arm/mach-omap2/
H A Dprminst44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "prcm-common.h"
23 #include "prm-regbits-44xx.h"
34 * omap_prm_base_init - Populates the prm partitions
75 /* Read-modify-write a register in PRM. Caller must lock */
90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of
97 * -EINVAL upon parameter error.
112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule
114 * @shift: register bit shift corresponding to the reset line to assert
118 * IP. These modules may have multiple hard-reset lines that reset
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H A Dprm2xxx_3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments, Inc.
18 #include "prm-regbits-24xx.h"
22 * omap2_prm_is_hardreset_asserted - read the HW reset line state of
31 * -EINVAL if called while running on a non-OMAP2/3 chip.
40 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
41 * @shift: register bit shift corresponding to the reset line to assert
48 * IP. These modules may have multiple hard-reset lines that reset
50 * place the submodule into reset. Returns 0 upon success or -EINVAL
64 * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
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/linux/drivers/pci/controller/dwc/
H A Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
37 #include "pcie-designware.h"
82 #define to_imx_pcie(x) dev_get_drvdata((x)->dev)
118 #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
137 int (*core_reset)(struct imx_pcie *pcie, bool assert);
183 /* PCIe Port Logic registers (memory-mapped) */
196 /* PHY registers (not memory-mapped) */
233 WARN_ON(imx_pcie->drvdata->variant != IMX8MQ && in imx_pcie_grp_offset()
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/linux/drivers/usb/dwc3/
H A Ddwc3-xilinx.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-xilinx.c - Xilinx DWC3 controller specific glue driver
15 #include <linux/dma-mapping.h>
22 #include <linux/firmware/xlnx-zynqmp.h>
62 reg = readl(priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst()
69 writel(reg, priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst()
74 struct device *dev = priv_data->dev; in dwc3_xlnx_set_coherency()
82 if (of_dma_is_coherent(dev->of_node) || device_iommu_mapped(dev)) { in dwc3_xlnx_set_coherency()
83 reg = readl(priv_data->regs + coherency_offset); in dwc3_xlnx_set_coherency()
85 writel(reg, priv_data->regs + coherency_offset); in dwc3_xlnx_set_coherency()
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/linux/tools/lib/subcmd/
H A Dhelp.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <assert.h>
13 #include "subcmd-util.h"
15 #include "exec-cmd.h"
23 ent->len = len; in add_cmdname()
24 memcpy(ent->name, name, len); in add_cmdname()
25 ent->name[len] = 0; in add_cmdname()
27 ALLOC_GROW(cmds->names, cmds->cnt + 1, cmds->alloc); in add_cmdname()
28 cmds->names[cmds->cnt++] = ent; in add_cmdname()
35 for (i = 0; i < cmds->cnt; ++i) in clean_cmdnames()
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/linux/Documentation/ABI/testing/
H A Dconfigfs-spear-pcie-gadget1 What: /config/pcie-gadget
15 # mount -t configfs none /config/
17 For nth PCIe Device Controller /config/pcie-gadget.n/:
24 inta write 1 to assert INTA and 0 to de-assert.
/linux/arch/arm/mach-imx/
H A Dsystem.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
19 #include <asm/proc-fns.h>
20 #include <asm/mach-types.h>
21 #include <asm/hardware/cache-l2x0.h>
41 /* Assert SRS signal */ in mxc_restart()
53 /* wait for reset to assert... */ in mxc_restart()
56 pr_err("%s: Watchdog reset failed to assert reset\n", __func__); in mxc_restart()
70 wdog_clk = clk_get_sys("imx2-wdt.0", NULL); in mxc_arch_reset_init()
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/linux/drivers/reset/sti/
H A Dreset-syscfg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <linux/reset-controller.h>
40 * @wait_for_ack: The controller will wait for reset assert and de-assert to
/linux/drivers/mmc/host/
H A Dsdhci-pci-dwc-mshc.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "sdhci-pci.h"
46 /* Assert reset to MMCM */ in sdhci_snps_set_clock()
62 /* De-assert reset to MMCM */ in sdhci_snps_set_clock()
/linux/drivers/hwmon/
H A Dsfctemp.c1 // SPDX-License-Identifier: GPL-2.0
19 * TempSensor reset. The RSTN can be de-asserted once the analog core has
21 * 0:reset 1:de-assert
27 * Tpu(min 50us) after PD is de-asserted. RSTN should be held low until the
41 * Temp(C)=DOUT*Y/4094 - K
65 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_up()
68 writel(0, sfctemp->regs); in sfctemp_power_up()
72 /* de-assert reset */ in sfctemp_power_up()
73 writel(SFCTEMP_RSTN, sfctemp->regs); in sfctemp_power_up()
79 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_down()
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