| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-mux-pinctrl.txt | 1 Pinctrl-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses pin multiplexing to
4 route the I2C signals, and represents the pin multiplexing configuration
7 +-----+ +-----+
9 +------------------------+ +-----+ +-----+
11 | /----|------+--------+
12 | +---+ +------+ | child bus A, on first set of pins
13 | |I2C|---|Pinmux| |
14 | +---+ +------+ | child bus B, on second set of pins
15 | \----|------+--------+--------+
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| H A D | i2c-mux-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
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| /freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,hdmi.txt | 8 - compatible: Should be "mediatek,<chip>-hdmi".
9 - the supported chips are mt2701, mt7623 and mt8173
10 - reg: Physical base address and length of the controller's registers
11 - interrupts: The interrupt signal from the function block.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: must contain "pixel", "pll", "bclk", and "spdif".
15 - phys: phandle link to the HDMI PHY node.
16 See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.
17 - phy-names: must contain "hdmi"
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| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | synopsys,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 bindings for the platform-specific integrations of the DWC HDMI TX.
26 reg-io-width:
36 - description: The bus clock for either AHB and APB
37 - description: The internal register configuration clock
40 clock-names:
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| /freebsd/sys/contrib/device-tree/Bindings/display/connector/ |
| H A D | vga-connector.txt | 6 - compatible: "vga-connector"
10 - label: a symbolic name for the connector corresponding to a hardware label
11 - ddc-i2c-bus: phandle to the I2C bus that is connected to VGA DDC
23 -------
26 compatible = "vga-connector";
29 ddc-i2c-bus = <&i2c3>;
33 remote-endpoint = <&adv7123_out>;
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| H A D | dvi-connector.txt | 5 - compatible: "dvi-connector"
8 - label: a symbolic name for the connector
9 - ddc-i2c-bus: phandle to the i2c bus that is connected to DVI DDC
10 - analog: the connector has DVI analog pins
11 - digital: the connector has DVI digital pins
12 - dual-link: the connector has pins for DVI dual-link
13 - hpd-gpios: HPD GPIO number
16 - Video port for DVI input
21 -------
24 compatible = "dvi-connector";
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| H A D | hdmi-connector.txt | 5 - compatible: "hdmi-connector"
6 - type: the HDMI connector type: "a", "b", "c", "d" or "e"
9 - label: a symbolic name for the connector
10 - hpd-gpios: HPD GPIO number
11 - ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing
12 - ddc-en-gpios: signal to enable DDC bus
15 - Video port for HDMI input
18 -------
21 compatible = "hdmi-connector";
28 remote-endpoint = <&tpd12s015_out>;
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| H A D | vga-connector.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/vga-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: vga-connector
18 ddc-i2c-bus:
19 description: phandle link to the I2C controller used for DDC EDID probing
27 - compatible
28 - port
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| H A D | dvi-connector.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dvi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: dvi-connector
18 hpd-gpios:
22 ddc-i2c-bus:
23 description: phandle link to the I2C controller used for DDC EDID probing
34 dual-link:
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| H A D | hdmi-connector.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/hdmi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: hdmi-connector
19 - a # Standard full size
20 - b # Never deployed?
21 - c # Mini
22 - d # Micro
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| /freebsd/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | hdmi.txt | 9 following device-specific properties.
14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
15 - reg: See dw_hdmi.txt.
16 - interrupts: HDMI interrupt number
17 - clocks: See dw_hdmi.txt.
18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
22 - gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI
27 - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
28 or the functionally-reduced I2C master contained in the DWC HDMI. When
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| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
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| H A D | nvidia,tegra124-sor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-so
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| H A D | nvidia,tegra20-host1x.txt | 4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
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| /freebsd/sys/contrib/device-tree/Bindings/display/rockchip/ |
| H A D | dw_hdmi-rockchip.txt | 9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
19 - reg: See dw_hdmi.txt.
20 - reg-io-width: See dw_hdmi.txt. Shall be 4.
21 - interrupts: HDMI interrupt number
22 - clocks: See dw_hdmi.txt.
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| H A D | rockchip,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <markyao0591@gmail.com>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18 - $ref: /schemas/sound/dai-common.yaml#
23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi
25 - rockchip,rk3328-dw-hdmi
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| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra20-ventana.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-op
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| H A D | tegra20-tamonten.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 rtc0 = "/i2c@7000d000/tps6586x@34";
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c
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| H A D | tegra20-seaboard.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
12 rtc0 = "/i2c@7000d000/tps6586x@34";
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-suppl
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| H A D | tegra20-asus-tf101.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-binding
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| H A D | tegra20-trimslice.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
7 #include "tegra20-cpu-opp.dtsi"
14 rtc0 = "/i2c@7000c500/rtc@56";
20 stdout-path = "serial0:115200n8";
31 vdd-supply = <&hdmi_vdd_reg>;
32 pll-supply = <&hdmi_pll_reg>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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| /freebsd/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Lauren
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| /freebsd/sys/arm/freescale/imx/ |
| H A D | imx6_hdmi.c | 1 /*-
37 #include <sys/bus.h>
43 #include <machine/bus.h>
63 {"fsl,imx6dl-hdmi", 1},
64 {"fsl,imx6q-hdmi", 1},
75 if (sc->i2c_xref == 0) in imx_hdmi_get_i2c_dev()
78 return (OF_device_from_xref(sc->i2c_xref)); in imx_hdmi_get_i2c_dev()
82 * Deferred HDMI init. dwc_hdmi_init() does i2c transfers for DDC/EDID. The imx
83 * i2c devices also use a config_intrhook function to finish their init, because
85 * whether the i2c or our hdmi intrhook function runs first. If we go first we
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | dp-aux-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort AUX bus
10 - Douglas Anderson <dianders@chromium.org>
14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus
16 particular, DP sinks support DDC over DP AUX which allows tunneling
17 a standard I2C DDC connection over the AUX channel.
20 of the DP controller under the "aux-bus" node.
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| /freebsd/sys/arm/nvidia/drm2/ |
| H A D | tegra_drm_subr.c | 1 /*-
29 #include <sys/bus.h>
33 #include <machine/bus.h>
46 #include <dt-bindings/gpio/gpio.h>
59 if (output->panel != NULL) { in tegra_drm_connector_get_modes()
65 edid = output->edid; in tegra_drm_connector_get_modes()
69 edid = drm_get_edid(connector, output->ddc); in tegra_drm_connector_get_modes()
89 return &(output->encoder); in tegra_drm_connector_best_encoder()
101 if (output->gpio_hpd == NULL) { in tegra_drm_connector_detect()
102 return ((output->panel != NULL) ? in tegra_drm_connector_detect()
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