1*c66ec88fSEmmanuel VadotFreescale i.MX6 DWC HDMI TX Encoder 2*c66ec88fSEmmanuel Vadot=================================== 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotThe HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP 5*c66ec88fSEmmanuel Vadotwith a companion PHY IP. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotThese DT bindings follow the Synopsys DWC HDMI TX bindings defined in 8*c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the 9*c66ec88fSEmmanuel Vadotfollowing device-specific properties. 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel VadotRequired properties: 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot- compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi". 15*c66ec88fSEmmanuel Vadot- reg: See dw_hdmi.txt. 16*c66ec88fSEmmanuel Vadot- interrupts: HDMI interrupt number 17*c66ec88fSEmmanuel Vadot- clocks: See dw_hdmi.txt. 18*c66ec88fSEmmanuel Vadot- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt. 19*c66ec88fSEmmanuel Vadot- ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports, 20*c66ec88fSEmmanuel Vadot numbered 0 to 3, corresponding to the four inputs of the HDMI multiplexer. 21*c66ec88fSEmmanuel Vadot Each port shall have a single endpoint. 22*c66ec88fSEmmanuel Vadot- gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI 23*c66ec88fSEmmanuel Vadot multiplexer control register. 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel VadotOptional properties 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master 28*c66ec88fSEmmanuel Vadot or the functionally-reduced I2C master contained in the DWC HDMI. When 29*c66ec88fSEmmanuel Vadot connected to a system I2C master this property contains a phandle to that 30*c66ec88fSEmmanuel Vadot I2C master controller. 31*c66ec88fSEmmanuel Vadot 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel VadotExample: 34*c66ec88fSEmmanuel Vadot 35*c66ec88fSEmmanuel Vadot gpr: iomuxc-gpr@20e0000 { 36*c66ec88fSEmmanuel Vadot /* ... */ 37*c66ec88fSEmmanuel Vadot }; 38*c66ec88fSEmmanuel Vadot 39*c66ec88fSEmmanuel Vadot hdmi: hdmi@120000 { 40*c66ec88fSEmmanuel Vadot #address-cells = <1>; 41*c66ec88fSEmmanuel Vadot #size-cells = <0>; 42*c66ec88fSEmmanuel Vadot compatible = "fsl,imx6q-hdmi"; 43*c66ec88fSEmmanuel Vadot reg = <0x00120000 0x9000>; 44*c66ec88fSEmmanuel Vadot interrupts = <0 115 0x04>; 45*c66ec88fSEmmanuel Vadot gpr = <&gpr>; 46*c66ec88fSEmmanuel Vadot clocks = <&clks 123>, <&clks 124>; 47*c66ec88fSEmmanuel Vadot clock-names = "iahb", "isfr"; 48*c66ec88fSEmmanuel Vadot ddc-i2c-bus = <&i2c2>; 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadot port@0 { 51*c66ec88fSEmmanuel Vadot reg = <0>; 52*c66ec88fSEmmanuel Vadot 53*c66ec88fSEmmanuel Vadot hdmi_mux_0: endpoint { 54*c66ec88fSEmmanuel Vadot remote-endpoint = <&ipu1_di0_hdmi>; 55*c66ec88fSEmmanuel Vadot }; 56*c66ec88fSEmmanuel Vadot }; 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadot port@1 { 59*c66ec88fSEmmanuel Vadot reg = <1>; 60*c66ec88fSEmmanuel Vadot 61*c66ec88fSEmmanuel Vadot hdmi_mux_1: endpoint { 62*c66ec88fSEmmanuel Vadot remote-endpoint = <&ipu1_di1_hdmi>; 63*c66ec88fSEmmanuel Vadot }; 64*c66ec88fSEmmanuel Vadot }; 65*c66ec88fSEmmanuel Vadot }; 66