xref: /freebsd/sys/arm/nvidia/drm2/tegra_drm_subr.c (revision be82b3a0bf72ed3b5f01ac9fcd8dcd3802e3c742)
1a0a23564SMichal Meloun /*-
2a0a23564SMichal Meloun  * Copyright (c) 2015 Michal Meloun
3a0a23564SMichal Meloun  * All rights reserved.
4a0a23564SMichal Meloun  *
5a0a23564SMichal Meloun  * Redistribution and use in source and binary forms, with or without
6a0a23564SMichal Meloun  * modification, are permitted provided that the following conditions
7a0a23564SMichal Meloun  * are met:
8a0a23564SMichal Meloun  * 1. Redistributions of source code must retain the above copyright
9a0a23564SMichal Meloun  *    notice, this list of conditions and the following disclaimer.
10a0a23564SMichal Meloun  * 2. Redistributions in binary form must reproduce the above copyright
11a0a23564SMichal Meloun  *    notice, this list of conditions and the following disclaimer in the
12a0a23564SMichal Meloun  *    documentation and/or other materials provided with the distribution.
13a0a23564SMichal Meloun  *
14a0a23564SMichal Meloun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15a0a23564SMichal Meloun  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16a0a23564SMichal Meloun  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17a0a23564SMichal Meloun  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18a0a23564SMichal Meloun  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19a0a23564SMichal Meloun  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20a0a23564SMichal Meloun  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21a0a23564SMichal Meloun  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22a0a23564SMichal Meloun  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23a0a23564SMichal Meloun  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24a0a23564SMichal Meloun  * SUCH DAMAGE.
25a0a23564SMichal Meloun  */
26a0a23564SMichal Meloun 
27a0a23564SMichal Meloun #include <sys/param.h>
28a0a23564SMichal Meloun #include <sys/systm.h>
29a0a23564SMichal Meloun #include <sys/bus.h>
30a0a23564SMichal Meloun #include <sys/kernel.h>
31a0a23564SMichal Meloun #include <sys/malloc.h>
32a0a23564SMichal Meloun 
33a0a23564SMichal Meloun #include <machine/bus.h>
34a0a23564SMichal Meloun 
35*be82b3a0SEmmanuel Vadot #include <dev/clk/clk.h>
36a0a23564SMichal Meloun #include <dev/drm2/drmP.h>
37a0a23564SMichal Meloun #include <dev/drm2/drm_crtc.h>
38a0a23564SMichal Meloun #include <dev/drm2/drm_crtc_helper.h>
39a0a23564SMichal Meloun #include <dev/drm2/drm_edid.h>
40a0a23564SMichal Meloun #include <dev/drm2/drm_fb_helper.h>
41a0a23564SMichal Meloun #include <dev/gpio/gpiobusvar.h>
42a0a23564SMichal Meloun #include <dev/ofw/ofw_bus_subr.h>
43a0a23564SMichal Meloun 
44a0a23564SMichal Meloun #include <arm/nvidia/drm2/tegra_drm.h>
45a0a23564SMichal Meloun 
468a7a4683SEmmanuel Vadot #include <dt-bindings/gpio/gpio.h>
47a0a23564SMichal Meloun 
48a0a23564SMichal Meloun int
tegra_drm_connector_get_modes(struct drm_connector * connector)49a0a23564SMichal Meloun tegra_drm_connector_get_modes(struct drm_connector *connector)
50a0a23564SMichal Meloun {
51a0a23564SMichal Meloun 	struct tegra_drm_encoder *output;
52a0a23564SMichal Meloun 	struct edid *edid = NULL;
53a0a23564SMichal Meloun 	int rv;
54a0a23564SMichal Meloun 
55a0a23564SMichal Meloun 	output = container_of(connector, struct tegra_drm_encoder,
56a0a23564SMichal Meloun 	     connector);
57a0a23564SMichal Meloun 
58a0a23564SMichal Meloun 	/* Panel is first */
59a0a23564SMichal Meloun 	if (output->panel != NULL) {
60a0a23564SMichal Meloun 		/* XXX panel parsing */
61a0a23564SMichal Meloun 		return (0);
62a0a23564SMichal Meloun 	}
63a0a23564SMichal Meloun 
64a0a23564SMichal Meloun 	/* static EDID is second*/
65a0a23564SMichal Meloun 	edid = output->edid;
66a0a23564SMichal Meloun 
67a0a23564SMichal Meloun 	/* EDID from monitor is last */
68a0a23564SMichal Meloun 	if (edid == NULL)
69a0a23564SMichal Meloun 		edid = drm_get_edid(connector, output->ddc);
70a0a23564SMichal Meloun 
71a0a23564SMichal Meloun 	if (edid == NULL)
72a0a23564SMichal Meloun 		return (0);
73a0a23564SMichal Meloun 
74a0a23564SMichal Meloun 	/* Process EDID */
75a0a23564SMichal Meloun 	drm_mode_connector_update_edid_property(connector, edid);
76a0a23564SMichal Meloun 	rv = drm_add_edid_modes(connector, edid);
77a0a23564SMichal Meloun 	drm_edid_to_eld(connector, edid);
78a0a23564SMichal Meloun 	return (rv);
79a0a23564SMichal Meloun }
80a0a23564SMichal Meloun 
81a0a23564SMichal Meloun struct drm_encoder *
tegra_drm_connector_best_encoder(struct drm_connector * connector)82a0a23564SMichal Meloun tegra_drm_connector_best_encoder(struct drm_connector *connector)
83a0a23564SMichal Meloun {
84a0a23564SMichal Meloun 	struct tegra_drm_encoder *output;
85a0a23564SMichal Meloun 
86a0a23564SMichal Meloun 	output = container_of(connector, struct tegra_drm_encoder,
87a0a23564SMichal Meloun 	     connector);
88a0a23564SMichal Meloun 
89a0a23564SMichal Meloun 	return &(output->encoder);
90a0a23564SMichal Meloun }
91a0a23564SMichal Meloun 
92a0a23564SMichal Meloun enum drm_connector_status
tegra_drm_connector_detect(struct drm_connector * connector,bool force)93a0a23564SMichal Meloun tegra_drm_connector_detect(struct drm_connector *connector, bool force)
94a0a23564SMichal Meloun {
95a0a23564SMichal Meloun 	struct tegra_drm_encoder *output;
96a0a23564SMichal Meloun 	bool active;
97a0a23564SMichal Meloun 	int rv;
98a0a23564SMichal Meloun 
99a0a23564SMichal Meloun 	output = container_of(connector, struct tegra_drm_encoder,
100a0a23564SMichal Meloun 	     connector);
101a0a23564SMichal Meloun 	if (output->gpio_hpd == NULL) {
102a0a23564SMichal Meloun 		return ((output->panel != NULL) ?
103a0a23564SMichal Meloun 		    connector_status_connected:
104a0a23564SMichal Meloun 		    connector_status_disconnected);
105a0a23564SMichal Meloun 	}
106a0a23564SMichal Meloun 
107a0a23564SMichal Meloun 	rv = gpio_pin_is_active(output->gpio_hpd, &active);
108a0a23564SMichal Meloun 	if (rv  != 0) {
109a0a23564SMichal Meloun 		device_printf(output->dev, " GPIO read failed: %d\n", rv);
110a0a23564SMichal Meloun 		return (connector_status_unknown);
111a0a23564SMichal Meloun 	}
112a0a23564SMichal Meloun 
113a0a23564SMichal Meloun 	return (active ?
114a0a23564SMichal Meloun 	    connector_status_connected : connector_status_disconnected);
115a0a23564SMichal Meloun }
116a0a23564SMichal Meloun 
117a0a23564SMichal Meloun int
tegra_drm_encoder_attach(struct tegra_drm_encoder * output,phandle_t node)118a0a23564SMichal Meloun tegra_drm_encoder_attach(struct tegra_drm_encoder *output, phandle_t node)
119a0a23564SMichal Meloun {
120a0a23564SMichal Meloun 	int rv;
121a0a23564SMichal Meloun 	phandle_t ddc;
122a0a23564SMichal Meloun 
123a0a23564SMichal Meloun 	/* XXX parse output panel here */
124a0a23564SMichal Meloun 
125f7604b1bSOleksandr Tymoshenko 	rv = OF_getencprop_alloc(node, "nvidia,edid",
126a0a23564SMichal Meloun 	    (void **)&output->edid);
127a0a23564SMichal Meloun 
128a0a23564SMichal Meloun 	/* EDID exist but have invalid size */
129a0a23564SMichal Meloun 	if ((rv >= 0) && (rv != sizeof(struct edid))) {
130a0a23564SMichal Meloun 		device_printf(output->dev,
131a0a23564SMichal Meloun 		    "Malformed \"nvidia,edid\" property\n");
132a0a23564SMichal Meloun 		if (output->edid != NULL)
133a0a23564SMichal Meloun 			free(output->edid, M_OFWPROP);
134a0a23564SMichal Meloun 		return (ENXIO);
135a0a23564SMichal Meloun 	}
136a0a23564SMichal Meloun 
137a0a23564SMichal Meloun 	gpio_pin_get_by_ofw_property(output->dev, node, "nvidia,hpd-gpio",
138a0a23564SMichal Meloun 	    &output->gpio_hpd);
139a0a23564SMichal Meloun 	ddc = 0;
140a0a23564SMichal Meloun 	OF_getencprop(node, "nvidia,ddc-i2c-bus", &ddc, sizeof(ddc));
141a0a23564SMichal Meloun 	if (ddc > 0)
142a0a23564SMichal Meloun 		output->ddc = OF_device_from_xref(ddc);
143a0a23564SMichal Meloun 	if ((output->edid == NULL) && (output->ddc == NULL))
144a0a23564SMichal Meloun 		return (ENXIO);
145a0a23564SMichal Meloun 
146a0a23564SMichal Meloun 	if (output->gpio_hpd != NULL) {
147a0a23564SMichal Meloun 		output->connector.polled =
148a0a23564SMichal Meloun //		    DRM_CONNECTOR_POLL_HPD;
149a0a23564SMichal Meloun 		    DRM_CONNECTOR_POLL_DISCONNECT |
150a0a23564SMichal Meloun 		    DRM_CONNECTOR_POLL_CONNECT;
151a0a23564SMichal Meloun 	}
152a0a23564SMichal Meloun 
153a0a23564SMichal Meloun 	return (0);
154a0a23564SMichal Meloun }
155a0a23564SMichal Meloun 
tegra_drm_encoder_init(struct tegra_drm_encoder * output,struct tegra_drm * drm)156a0a23564SMichal Meloun int tegra_drm_encoder_init(struct tegra_drm_encoder *output,
157a0a23564SMichal Meloun     struct tegra_drm *drm)
158a0a23564SMichal Meloun {
159a0a23564SMichal Meloun 
160a0a23564SMichal Meloun 	if (output->panel) {
161a0a23564SMichal Meloun 		/* attach panel */
162a0a23564SMichal Meloun 	}
163a0a23564SMichal Meloun 	return (0);
164a0a23564SMichal Meloun }
165a0a23564SMichal Meloun 
tegra_drm_encoder_exit(struct tegra_drm_encoder * output,struct tegra_drm * drm)166a0a23564SMichal Meloun int tegra_drm_encoder_exit(struct tegra_drm_encoder *output,
167a0a23564SMichal Meloun     struct tegra_drm *drm)
168a0a23564SMichal Meloun {
169a0a23564SMichal Meloun 
170a0a23564SMichal Meloun 	if (output->panel) {
171a0a23564SMichal Meloun 		/* detach panel */
172a0a23564SMichal Meloun 	}
173a0a23564SMichal Meloun 	return (0);
174a0a23564SMichal Meloun }
175