| /illumos-gate/usr/src/cmd/picl/plugins/sun4u/boston/frutree/ |
| H A D | system-board.info | 110 REFNODE cpu-module fru WITH name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,b8
111 name:/frutree/chassis/MB/system-board/C0/cpu-module
113 REFPROP _seeprom_source name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,b8
115 name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,b8
116 REFPROP _fru_parent name:/frutree/chassis/MB/system-board/C0/cpu-module
122 REFNODE cpu-module fru WITH name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,c8
123 name:/frutree/chassis/MB/system-board/C1/cpu-module
125 REFPROP _seeprom_source name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,c8
127 name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,c8
128 REFPROP _fru_parent name:/frutree/chassis/MB/system-board/C1/cpu-module
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| /illumos-gate/usr/src/cmd/fm/eversholt/files/i386/i86pc/ |
| H A D | intel.esc | 29 * Eversholt rules for the intel CPU/Memory
37 event ereport.cpu.intel.leafclass@chip/core/strand { within(t) }
52 * trips. prop statement for ereport.cpu.intel.internal_unclassified is
56 engine serd.cpu.intel.simple@chip/core/strand, N=3, T=72h;
57 event fault.cpu.intel.internal@chip/core/strand,
58 engine=serd.cpu.intel.simple@chip/core/strand;
60 prop fault.cpu.intel.internal@chip/core/strand
62 ereport.cpu.intel.microcode_rom_parity@chip/core/strand,
63 ereport.cpu.intel.internal_timer@chip/core/strand,
64 ereport.cpu.intel.internal_parity@chip/core/strand,
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| H A D | amd64.esc | 30 * Eversholt rules for the AMD Opteron CPU/Memory
122 event ereport.cpu.amd.ic.inf_sys_ecc1@chip/core/strand{within(5s)};
123 event ereport.cpu.amd.dc.inf_sys_ecc1@chip/core/strand{within(5s)};
124 event ereport.cpu.amd.bu.s_ecc1@chip/core/strand{within(5s)};
125 event ereport.cpu.amd.nb.mem_ce@chip/core/strand{within(5s)};
246 ereport.cpu.amd.dc.inf_sys_ecc1@chip/core<>/strand<>,
247 ereport.cpu.amd.bu.s_ecc1@chip/core<>/strand<>,
248 ereport.cpu.amd.nb.mem_ce@chip/core<>/strand<>;
253 ereport.cpu.amd.dc.inf_sys_ecc1@chip/core<>/strand<>,
254 ereport.cpu.amd.bu.s_ecc1@chip/core<>/strand<>,
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| /illumos-gate/usr/src/cmd/fm/dicts/ |
| H A D | INTEL.dict | 29 fault.cpu.intel.internal=1
30 fault.cpu.intel.l0cache=2
31 fault.cpu.intel.l1cache=3
32 fault.cpu.intel.l2cache=4
33 fault.cpu.intel.cache=5
34 fault.cpu.intel.l0dtlb=6
35 fault.cpu.intel.l1dtlb=7
36 fault.cpu.intel.l2dtlb=8
37 fault.cpu.intel.dtlb=9
38 fault.cpu.intel.l0itlb=10
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| H A D | GMCA.po | 28 # keys: fault.cpu.generic-x86.internal
35 msgstr "An internal error has been encountered on this cpu. Refer to %s for more information."
37 msgstr "The system will attempt to offline this cpu to remove it from service."
41 msgstr "Schedule a repair procedure to replace the affected CPU. Use 'fmadm faulty' to identify th…
44 # keys: fault.cpu.generic-x86.l0cache
51 msgstr "A level 0 cache on this cpu is faulty. Refer to %s for more information."
53 msgstr "The system will attempt to offline this cpu to remove it from service."
57 msgstr "Schedule a repair procedure to replace the affected CPU. Use 'fmadm faulty' to identify th…
60 # keys: fault.cpu.generic-x86.l1cache
67 msgstr "A level 1 cache on this cpu is faulty. Refer to %s for more information."
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| H A D | GMCA.dict | 29 fault.cpu.generic-x86.internal=1
30 fault.cpu.generic-x86.l0cache=2
31 fault.cpu.generic-x86.l1cache=3
32 fault.cpu.generic-x86.l2cache=4
33 fault.cpu.generic-x86.cache=5
34 fault.cpu.generic-x86.l0dtlb=6
35 fault.cpu.generic-x86.l1dtlb=7
36 fault.cpu.generic-x86.l2dtlb=8
37 fault.cpu.generic-x86.dtlb=9
38 fault.cpu.generic-x86.l0itlb=10
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| H A D | INTEL.po | 28 # keys: fault.cpu.intel.internal
35 msgstr "An internal error has been encountered on this cpu. Refer to %s for more information."
37 msgstr "The system will attempt to offline this cpu to remove it from service."
41 msgstr "Schedule a repair procedure to replace the affected CPU. Use 'fmadm faulty' to identify th…
44 # keys: fault.cpu.intel.l0cache
51 msgstr "A level 0 cache on this cpu is faulty. Refer to %s for more information."
53 msgstr "The system will attempt to offline this cpu to remove it from service."
57 msgstr "Schedule a repair procedure to replace the affected CPU. Use 'fmadm faulty' to identify th…
60 # keys: fault.cpu.intel.l1cache
67 msgstr "A level 1 cache on this cpu is faulty. Refer to %s for more information."
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| H A D | AMD.po | 92 # keys: fault.cpu.amd.l2cachedata
99 msgstr "The number of errors associated with this CPU has exceeded acceptable levels. Refer to %s …
101 msgstr "An attempt will be made to remove this CPU from service."
105 msgstr "Schedule a repair procedure to replace the affected CPU. Use 'fmadm faulty' to identify th…
108 # keys: fault.cpu.amd.l2cachetag
115 msgstr "The number of errors associated with this CPU has exceeded acceptable levels. Refer to %s …
117 msgstr "An attempt will be made to remove this CPU from service."
121 msgstr "Schedule a repair procedure to replace the affected CPU. Use 'fmadm faulty' to identify th…
124 # keys: fault.cpu.amd.icachedata
131 msgstr "The number of errors associated with this CPU has exceeded acceptable levels. Refer to %s …
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| /illumos-gate/usr/src/uts/common/sys/ |
| H A D | cpuvar.h | 79 * Per-CPU data.
86 typedef struct cpu { struct
87 processorid_t cpu_id; /* CPU number */
88 processorid_t cpu_seqid; /* sequential CPU id (0..ncpus-1) */
89 volatile cpu_flag_t cpu_flags; /* flags indicating CPU state */
90 struct cpu *cpu_self; /* pointer to itself */ argument
92 kthread_t *cpu_idle_thread; /* idle thread for this CPU */
93 kthread_t *cpu_pause_thread; /* pause thread for this CPU */
96 struct cpupart *cpu_part; /* partition with this CPU */
97 struct lgrp_ld *cpu_lpl; /* pointer to this cpu's load */ argument
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| /illumos-gate/usr/src/uts/i86pc/io/apix/ |
| H A D | apix_intr.c | 102 struct cpu *cpu = CPU; in apix_remove_pending_av() local
110 if (avp->av_vector != NULL && avp->av_prilevel < cpu->cpu_base_spl) { in apix_remove_pending_av()
230 apix_do_softint_prolog(struct cpu *cpu, uint_t pil, uint_t oldpil, in apix_do_softint_prolog() argument
234 struct machcpu *mcpu = &cpu->cpu_m; in apix_do_softint_prolog()
238 ASSERT(pil > mcpu->mcpu_pri && pil > cpu->cpu_base_spl); in apix_do_softint_prolog()
249 * allocate one for each level on the CPU. in apix_do_softint_prolog()
251 it = cpu->cpu_intr_thread; in apix_do_softint_prolog()
253 cpu->cpu_intr_thread = it->t_link; in apix_do_softint_prolog()
256 t = cpu->cpu_thread; in apix_do_softint_prolog()
260 cpu->cpu_intracct[cpu->cpu_mstate] += intrtime; in apix_do_softint_prolog()
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| /illumos-gate/usr/src/uts/common/os/ |
| H A D | cyclic.c | 61 * arbitrarily high resolution, per-CPU interval timers (to avoid colliding
64 * optionally bound to a CPU or a CPU partition. A cyclic's CPU or CPU
66 * to a CPU which satisfies the new binding. Alternatively, a cyclic may
113 * cyclic_bind() <-- Change a cyclic's CPU or partition binding
115 * cyclic_move_here() <-- Shuffle cyclic to current CPU
119 * cyclic_juggle() <-- Juggles cyclics away from a CPU
120 * cyclic_offline() <-- Offlines cyclic operation on a CPU
121 * cyclic_online() <-- Reenables operation on an offlined CPU
122 * cyclic_move_in() <-- Notifies subsystem of change in CPU partition
123 * cyclic_move_out() <-- Notifies subsystem of change in CPU partition
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| H A D | pg.c | 62 * to a group of CPUs. Depending on the nature of the CPU relationship
80 * class specific callbacks to be invoked when the CPU related system
103 * Bootstrap CPU specific PG data
170 * CPU configuration callbacks
197 * CPU / cpupart configuration callbacks
242 pg_cmt_cpu_startup(CPU); in pg_init()
246 * Perform CPU 0 initialization
254 * Create the physical ID cache for the boot CPU in pg_cpu0_init()
256 pghw_physid_create(CPU); in pg_cpu0_init()
263 (void) pg_cpu_init(CPU, B_FALSE); in pg_cpu0_init()
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| H A D | cap_util.c | 37 * memory, etc.) and attribute the utilization to the responsible CPU and the
41 * components and how much is used by each CPU and each thread. With
62 * reading the counters for a given CPU as lightweight and fast as possible.
71 * CPU once and make (un)programming and reading the counters for a given CPU
73 * state needed to (un)program and read the counters on a CPU is kept per CPU
76 * the target CPU and disable preemption while running on the target CPU to
77 * protect any critical sections. All counter manipulation on the target CPU is
78 * happening either from a cross-call to the target CPU or at the same PIL as
85 * between the kernel and user on each CPU. When the user starts using the
86 * counters on a given CPU, the kernel will unprogram the counters that it is
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| H A D | cpu.c | 29 * Architecture-independent CPU control functions.
51 #include <sys/kmem_impl.h> /* to set per-cpu kmem_cache offset */
108 * copies of the cpu pointers be kept as they may become invalid.
135 * Maximum possible CPU id. This can never be >= NCPU since NCPU is
136 * used to size arrays that are indexed by CPU id.
152 * CPU that we're trying to offline. Protected by cpu_lock.
393 * Set affinity for a specified CPU.
396 * curthread, will set affinity to the CPU on which the thread is currently
398 * referenced CPU remains valid, which can be done by holding cpu_lock across
401 * CPU affinity is guaranteed after return of thread_affinity_set(). If a
[all …]
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| /illumos-gate/usr/src/cmd/picl/plugins/sun4u/chalupa/frutree/ |
| H A D | system-board.info | 87 …REFNODE system-board fru WITH name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddre…
90 REFPROP _seeprom_source name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddress=0,be
92 name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddress=0,be
99 …REFNODE system-board fru WITH name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddre…
102 REFPROP _seeprom_source name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddress=0,ce
104 name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddress=0,ce
111 …REFNODE system-board fru WITH name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddre…
114 REFPROP _seeprom_source name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddress=0,de
116 name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddress=0,de
123 …REFNODE system-board fru WITH name:/platform/pci@1e,600000/isa@7/i2c@0,320/cpu-fru-prom?UnitAddre…
[all …]
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| /illumos-gate/usr/src/uts/sun4/os/ |
| H A D | mp_startup.c | 52 extern int cpu_intrq_setup(struct cpu *);
53 extern void cpu_intrq_cleanup(struct cpu *);
54 extern void cpu_intrq_register(struct cpu *);
56 struct cpu *cpus; /* pointer to other cpus; dynamically allocate */
57 struct cpu *cpu[NCPU]; /* pointers to all CPUs */ variable
79 * Amount of time (in milliseconds) we should wait before giving up on CPU
80 * initialization and assuming that the CPU we're trying to wake up is dead
88 * other than boot cpu.
99 * common slave cpu initialization code
109 * Allocate and initialize the startup thread for this CPU. in common_startup_init()
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| /illumos-gate/usr/src/cmd/picl/plugins/sun4u/mpxu/frutree/ |
| H A D | system-board.info | 72 PROP SlotType string r 0 "cpu"
76 PROP SlotType string r 0 "cpu"
84 REFNODE cpu fru WITH name:/platform/SUNW,UltraSPARC-IIIi@0,0
85 name:/frutree/chassis/MB/system-board/P0/cpu
86 REFNODE F0 location WITH name:/frutree/chassis/MB/system-board/P0/cpu
87 name:/frutree/chassis/MB/system-board/P0/cpu/F0
91 name:/frutree/chassis/MB/system-board/P0/cpu
92 REFNODE F1 location WITH name:/frutree/chassis/MB/system-board/P0/cpu
93 name:/frutree/chassis/MB/system-board/P0/cpu/F1
97 name:/frutree/chassis/MB/system-board/P0/cpu
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| /illumos-gate/usr/src/uts/i86pc/os/ |
| H A D | mp_startup.c | 39 #include <sys/cpu.h>
87 struct cpu cpus[1] __aligned(MMU_PAGESIZE);
88 struct cpu *cpu[NCPU] = {&cpus[0]}; variable
89 struct cpu *cpu_free_list;
124 * Init CPU info - get CPU type info for processor_info system call.
127 init_cpu_info(struct cpu *cp) in init_cpu_info()
132 * Get clock-frequency property for the CPU. in init_cpu_info()
156 * If called for the BSP, cp is equal to current CPU. in init_cpu_info()
158 * of current CPU as default values for cpu_idstr and cpu_brandstr. in init_cpu_info()
160 * CPUID_PASS_DYNAMIC has been invoked on target CPU. in init_cpu_info()
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| H A D | intr.c | 68 * interrupts (IPI) which are the basis for CPU cross calls and CPU pokes.
206 * current CPU contains a number of kernel threads (kthread_t) that can be used
216 * interrupts, but the notification vector is different. Each CPU has a bitmask
217 * of pending software interrupts. We can notify a CPU to process software
326 * now have per-cpu vectors.
504 * This variable tracks the last place events were disabled on each cpu
517 * Set cpu's base SPL level to the highest active interrupt level
522 struct cpu *cpu = CPU; in set_base_spl() local
523 uint16_t active = (uint16_t)cpu->cpu_intr_actv; in set_base_spl()
525 cpu->cpu_base_spl = active == 0 ? 0 : bsrw_insn(active); in set_base_spl()
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| /illumos-gate/usr/src/uts/intel/io/intel_nhm/ |
| H A D | intel_nhm.h | 50 #define SOCKET_BUS(cpu) (MAX_BUS_NUMBER - (cpu)) argument
51 #define CPU_ID_RD(cpu) nhm_pci_getl(SOCKET_BUS(cpu), 0, 0, 0, 0) argument
52 #define MC_CONTROL_RD(cpu) \ argument
53 nhm_pci_getl(SOCKET_BUS(cpu), 3, 0, 0x48, 0)
54 #define MC_STATUS_RD(cpu) \ argument
55 nhm_pci_getl(SOCKET_BUS(cpu), 3, 0, 0x4c, 0)
56 #define MC_SMI_SPARE_DIMM_ERROR_STATUS_RD(cpu) \ argument
57 nhm_pci_getl(SOCKET_BUS(cpu), 3, 0, 0x50, 0)
58 #define MC_CPU_RAS_RD(cpu) \ argument
59 nhm_pci_getl(SOCKET_BUS(cpu), 3, 2, 0, 0)
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| /illumos-gate/usr/src/cmd/fm/modules/common/cpumem-retire/ |
| H A D | cma_main.c | 54 { "cpu_flts", FMD_TYPE_UINT64, "cpu faults resolved" },
55 { "cpu_repairs", FMD_TYPE_UINT64, "cpu faults repaired" },
56 { "cpu_fails", FMD_TYPE_UINT64, "cpu faults unresolveable" },
57 { "cpu_blfails", FMD_TYPE_UINT64, "failed cpu blacklists" },
58 { "cpu_supp", FMD_TYPE_UINT64, "cpu offlines suppressed" },
59 { "cpu_blsupp", FMD_TYPE_UINT64, "cpu blacklists suppressed" },
82 * cpumem-retire wants to retire a cpu or mem page, it calls the
129 { "fault.cpu.intel.quickpath.mem_scrubbing", FM_FMRI_SCHEME_HC,
131 { "fault.cpu.intel.quickpath.*", FM_FMRI_SCHEME_HC,
133 { "fault.cpu.generic-x86.mc", FM_FMRI_SCHEME_HC,
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| /illumos-gate/usr/src/cmd/picl/plugins/sun4u/daktari/frutree/ |
| H A D | piclfrutree.info | 33 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J2900
35 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J3100
37 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J2901
39 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J3101
41 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J3000
43 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J3200
45 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J3001
47 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J3201
49 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J7900
51 name:/frutree/chassis/system-board/cpu-mem-slot?Label=A/mem-slot?Label=J8100
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| /illumos-gate/usr/src/uts/sun4v/os/ |
| H A D | intrq.c | 28 #include <sys/cpu.h>
36 cpu_intrq_register(struct cpu *cpu) in cpu_intrq_register() argument
38 struct machcpu *mcpup = &cpu->cpu_m; in cpu_intrq_register()
43 cmn_err(CE_PANIC, "cpu%d: cpu_mondo queue configuration " in cpu_intrq_register()
44 "failed, error %lu", cpu->cpu_id, ret); in cpu_intrq_register()
48 cmn_err(CE_PANIC, "cpu%d: dev_mondo queue configuration " in cpu_intrq_register()
49 "failed, error %lu", cpu->cpu_id, ret); in cpu_intrq_register()
53 cmn_err(CE_PANIC, "cpu%d: resumable error queue configuration " in cpu_intrq_register()
54 "failed, error %lu", cpu->cpu_id, ret); in cpu_intrq_register()
58 cmn_err(CE_PANIC, "cpu%d: non-resumable error queue " in cpu_intrq_register()
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| /illumos-gate/usr/src/compat/bhyve/sys/ |
| H A D | cpuset.h | 26 #define CPU_SET(cpu, set) cpuset_add((set), (cpu)) argument
27 #define CPU_SETOF(cpu, set) cpuset_only((set), (cpu)) argument
29 #define CPU_CLR(cpu, set) cpuset_del((set), (cpu)) argument
32 #define CPU_ISSET(cpu, set) cpu_in_set((cpuset_t *)(set), (cpu)) argument
42 #define CPU_SET_ATOMIC(cpu, set) cpuset_atomic_add( \ argument
44 (cpu))
45 #define CPU_CLR_ATOMIC(cpu, set) cpuset_atomic_del( \ argument
47 (cpu))
49 #define CPU_SET_ATOMIC_ACQ(cpu, set) cpuset_atomic_add((set), (cpu)) argument
118 #define CPU_SET(cpu, setp) BT_SET((setp)->_bits, cpu) argument
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| /illumos-gate/usr/src/cmd/mdb/common/modules/genunix/ |
| H A D | cyclic.c | 41 cyccpu_vread(cyc_cpu_t *cpu, uintptr_t addr) in cyccpu_vread() argument
50 cyccpu_size = (cyc_trace_enabled) ? sizeof (*cpu) : in cyccpu_vread()
54 if (mdb_vread(cpu, cyccpu_size, addr) == -1) in cyccpu_vread()
58 bzero(cpu->cyp_trace, sizeof (cpu->cyp_trace)); in cyccpu_vread()
66 if (mdb_layered_walk("cpu", wsp) == -1) { in cyccpu_walk_init()
67 mdb_warn("couldn't walk 'cpu'"); in cyccpu_walk_init()
78 cyc_cpu_t cpu; in cyccpu_walk_step() local
80 if (cyccpu_vread(&cpu, addr) == -1) { in cyccpu_walk_step()
85 return (wsp->walk_callback(addr, &cpu, wsp->walk_cbdata)); in cyccpu_walk_step()
134 cyclic_dump_node(cyc_cpu_t *cpu, cyc_index_t *heap, char **c, size_t w, in cyclic_dump_node() argument
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