| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,coresight-stm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Arm CoreSight System Trace MacroCell 10 - Mathieu Poirier <mathieu.poirier@linaro.org> 11 - Mike Leach <mike.leach@linaro.org> 12 - Leo Yan <leo.yan@linaro.org> 13 - Suzuki K Poulose <suzuki.poulose@arm.com> 16 CoreSight components are compliant with the ARM CoreSight architecture [all …]
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| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | sc9836.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #address-cells = <2>; 16 #size-cells = <0>; 20 compatible = "arm,cortex-a53"; 22 enable-method = "psci"; 27 compatible = "arm,cortex-a53"; 29 enable-method = "psci"; 34 compatible = "arm,cortex-a53"; 36 enable-method = "psci"; [all …]
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| H A D | sc9860.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 15 #address-cells = <2>; 16 #size-cells = <0>; 18 cpu-map { 52 compatible = "arm,cortex-a53"; 54 enable-method = "psci"; 55 cpu-idle-states = <&CORE_PD &CLUSTER_PD>; [all …]
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| /linux/drivers/hwtracing/stm/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 config STM config 6 A System Trace Module (STM) is a device exporting data in System 8 Examples of such devices are Intel(R) Trace Hub and Coresight STM. 12 if STM 15 tristate "Basic STM framing protocol driver" 18 This is a simple framing protocol for sending data over STM 19 devices. This was the protocol that the STM framework used 20 exclusively until the MIPI SyS-T support was added. Use this 21 driver for compatibility with your existing STM setup. [all …]
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| /linux/include/uapi/linux/ |
| H A D | coresight-stm.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 12 * The CoreSight STM supports guaranteed and invariant timing 15 * ensure the transaction is accepted by the STM. While invariant 18 * state of the STM.
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 #address-cells = <1>; 14 #size-cells = <1>; 18 frame-number = <1>; 30 #mbox-cells = <1>; 32 clock-names = "apb_pclk"; 36 compatible = "arm,mmu-400", "arm,smmu-v1"; [all …]
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| /linux/Documentation/trace/ |
| H A D | stm.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 System Trace Module (STM) is a device described in MIPI STP specs as 26 To solve this mapping problem, stm class provides a policy management 34 associated with it, located in "stp-policy" subsystem directory in 36 the STM device name to which this policy applies and an arbitrary 40 $ ls /config/stp-policy/dummy_stm.my-policy/user 42 $ cat /config/stp-policy/dummy_stm.my-policy/user/masters 44 $ cat /config/stp-policy/dummy_stm.my-policy/user/channels 57 Trace sources have to open the stm class device's node and write their 67 stm core will try to find a policy node with the name matching the [all …]
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| H A D | index.rst | 11 ----------------------- 21 tracepoint-analysis 22 ring-buffer-map 25 ----------------------- 34 ftrace-design 35 ftrace-uses 41 ring-buffer-design 44 -------------------------- 53 events-kmem 54 events-power [all …]
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| /linux/include/linux/ |
| H A D | coresight-stm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 #include <uapi/linux/coresight-stm.h>
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,rpm-icc.h> [all …]
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| H A D | apq8016-schneider-hmibsc.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 9 #include "msm8916-pm8916.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 14 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 15 #include <dt-bindings/sound/apq8016-lpass.h> 19 compatible = "schneider,apq8016-hmibsc", "qcom,apq8016"; [all …]
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| /linux/drivers/accel/habanalabs/goya/ |
| H A D | goya_coresight.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright 2016-2019 HabanaLabs, Ltd. 205 if (hdev->pldm) in goya_coresight_timeout() 219 dev_err(hdev->dev, in goya_coresight_timeout() 220 "Timeout while waiting for coresight, addr: 0x%llx, position: %d, up: %d\n", in goya_coresight_timeout() 222 return -EFAULT; in goya_coresight_timeout() 236 if (params->reg_idx >= ARRAY_SIZE(debug_stm_regs)) { in goya_config_stm() 237 dev_err(hdev->dev, "Invalid register index in STM\n"); in goya_config_stm() 238 return -EINVAL; in goya_config_stm() 241 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in goya_config_stm() [all …]
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| /linux/drivers/ |
| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 6 # Rewritten to use lists instead of if-statements. 9 obj-y += cache/ 10 obj-y += irqchip/ 11 obj-y += bus/ 13 obj-$(CONFIG_GENERIC_PHY) += phy/ 16 obj-$(CONFIG_PINCTRL) += pinctrl/ 17 obj-$(CONFIG_GPIOLIB) += gpio/ 18 obj-y += pwm/ 21 obj-y += leds/ [all …]
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| /linux/drivers/accel/habanalabs/gaudi/ |
| H A D | gaudi_coresight.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright 2016-2018 HabanaLabs, Ltd. 381 dev_err(hdev->dev, in gaudi_coresight_timeout() 382 "Timeout while waiting for coresight, addr: 0x%llx, position: %d, up: %d\n", in gaudi_coresight_timeout() 384 return -EFAULT; in gaudi_coresight_timeout() 398 if (params->reg_idx >= ARRAY_SIZE(debug_stm_regs)) { in gaudi_config_stm() 399 dev_err(hdev->dev, "Invalid register index in STM\n"); in gaudi_config_stm() 400 return -EINVAL; in gaudi_config_stm() 403 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in gaudi_config_stm() 407 if (params->enable) { in gaudi_config_stm() [all …]
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| /linux/drivers/accel/habanalabs/gaudi2/ |
| H A D | gaudi2_coresight_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 14 /* FUNNEL Offsets - same offsets for all funnels*/ 16 (mmDCORE0_TPC0_EML_FUNNEL_CTRL_REG - \ 20 (mmDCORE0_TPC0_EML_FUNNEL_PRIORITY_CTRL_REG - \ 24 (mmDCORE0_TPC0_EML_FUNNEL_ITATBDATA0 - \ 28 (mmDCORE0_TPC0_EML_FUNNEL_ITATBCTR2 - \ 32 (mmDCORE0_TPC0_EML_FUNNEL_ITATBCTR1 - \ 36 (mmDCORE0_TPC0_EML_FUNNEL_ITATBCTR0 - \ 40 (mmDCORE0_TPC0_EML_FUNNEL_ITCTRL - \ 44 (mmDCORE0_TPC0_EML_FUNNEL_CLAIMSET - \ [all …]
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| /linux/drivers/soc/tegra/cbb/ |
| H A D | tegra234-cbb.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2021-2025, NVIDIA CORPORATION. All rights reserved 25 #include <soc/tegra/tegra-cbb.h> 190 if (!cbb->fabric->firewall_base || in tegra234_cbb_write_access_allowed() 191 !cbb->fabric->firewall_ctl || in tegra234_cbb_write_access_allowed() 192 !cbb->fabric->firewall_wr_ctl) { in tegra234_cbb_write_access_allowed() 193 dev_info(&pdev->dev, "SoC data missing for firewall\n"); in tegra234_cbb_write_access_allowed() 197 if ((cbb->fabric->firewall_ctl > FIREWALL_APERTURE_SZ) || in tegra234_cbb_write_access_allowed() 198 (cbb->fabric->firewall_wr_ctl > FIREWALL_APERTURE_SZ)) { in tegra234_cbb_write_access_allowed() 199 dev_err(&pdev->dev, "wrong firewall offset value\n"); in tegra234_cbb_write_access_allowed() [all …]
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interconnect/qcom,msm8974.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 11 #include <dt-bindings/gpio/gpio.h> [all …]
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| /linux/ |
| H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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