1338a588eSMike Leach /* SPDX-License-Identifier: GPL-2.0 */ 2338a588eSMike Leach /* 3338a588eSMike Leach * Copyright(C) 2022 Linaro Limited. All rights reserved. 4338a588eSMike Leach * Author: Mike Leach <mike.leach@linaro.org> 5338a588eSMike Leach */ 6338a588eSMike Leach 7338a588eSMike Leach #ifndef _CORESIGHT_TRACE_ID_H 8338a588eSMike Leach #define _CORESIGHT_TRACE_ID_H 9338a588eSMike Leach 10338a588eSMike Leach /* 11338a588eSMike Leach * Coresight trace ID allocation API 12338a588eSMike Leach * 13338a588eSMike Leach * With multi cpu systems, and more additional trace sources a scalable 14338a588eSMike Leach * trace ID reservation system is required. 15338a588eSMike Leach * 16338a588eSMike Leach * The system will allocate Ids on a demand basis, and allow them to be 17338a588eSMike Leach * released when done. 18338a588eSMike Leach * 19338a588eSMike Leach * In order to ensure that a consistent cpu / ID matching is maintained 20*de0029fdSJames Clark * throughout a perf cs_etm event session - a session in progress flag will be 21*de0029fdSJames Clark * maintained for each sink, and IDs are cleared when all the perf sessions 22*de0029fdSJames Clark * complete. This allows the same CPU to be re-allocated its prior ID when 23*de0029fdSJames Clark * events are scheduled in and out. 24338a588eSMike Leach * 25338a588eSMike Leach * 26338a588eSMike Leach * Trace ID maps will be created and initialised to prevent architecturally 27338a588eSMike Leach * reserved IDs from being allocated. 28338a588eSMike Leach * 29338a588eSMike Leach * API permits multiple maps to be maintained - for large systems where 30338a588eSMike Leach * different sets of cpus trace into different independent sinks. 31338a588eSMike Leach */ 32338a588eSMike Leach 33338a588eSMike Leach #include <linux/bitops.h> 34338a588eSMike Leach #include <linux/types.h> 35338a588eSMike Leach 36338a588eSMike Leach /* ID 0 is reserved */ 37338a588eSMike Leach #define CORESIGHT_TRACE_ID_RES_0 0 38338a588eSMike Leach 39338a588eSMike Leach /* ID 0x70 onwards are reserved */ 40338a588eSMike Leach #define CORESIGHT_TRACE_ID_RES_TOP 0x70 41338a588eSMike Leach 42338a588eSMike Leach /* check an ID is in the valid range */ 43338a588eSMike Leach #define IS_VALID_CS_TRACE_ID(id) \ 44338a588eSMike Leach ((id > CORESIGHT_TRACE_ID_RES_0) && (id < CORESIGHT_TRACE_ID_RES_TOP)) 45338a588eSMike Leach 46338a588eSMike Leach /** 47338a588eSMike Leach * Read and optionally allocate a CoreSight trace ID and associate with a CPU. 48338a588eSMike Leach * 49338a588eSMike Leach * Function will read the current trace ID for the associated CPU, 50338a588eSMike Leach * allocating an new ID if one is not currently allocated. 51338a588eSMike Leach * 52338a588eSMike Leach * Numeric ID values allocated use legacy allocation algorithm if possible, 53338a588eSMike Leach * otherwise any available ID is used. 54338a588eSMike Leach * 55338a588eSMike Leach * @cpu: The CPU index to allocate for. 56338a588eSMike Leach * 57338a588eSMike Leach * return: CoreSight trace ID or -EINVAL if allocation impossible. 58338a588eSMike Leach */ 59338a588eSMike Leach int coresight_trace_id_get_cpu_id(int cpu); 60338a588eSMike Leach 61338a588eSMike Leach /** 627e528778SJames Clark * Version of coresight_trace_id_get_cpu_id() that allows the ID map to operate 637e528778SJames Clark * on to be provided. 647e528778SJames Clark */ 657e528778SJames Clark int coresight_trace_id_get_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map); 667e528778SJames Clark 677e528778SJames Clark /** 68338a588eSMike Leach * Release an allocated trace ID associated with the CPU. 69338a588eSMike Leach * 70*de0029fdSJames Clark * This will release the CoreSight trace ID associated with the CPU. 71338a588eSMike Leach * 72338a588eSMike Leach * @cpu: The CPU index to release the associated trace ID. 73338a588eSMike Leach */ 74338a588eSMike Leach void coresight_trace_id_put_cpu_id(int cpu); 75338a588eSMike Leach 76338a588eSMike Leach /** 777e528778SJames Clark * Version of coresight_trace_id_put_cpu_id() that allows the ID map to operate 787e528778SJames Clark * on to be provided. 797e528778SJames Clark */ 807e528778SJames Clark void coresight_trace_id_put_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map); 817e528778SJames Clark 827e528778SJames Clark /** 83338a588eSMike Leach * Read the current allocated CoreSight Trace ID value for the CPU. 84338a588eSMike Leach * 85338a588eSMike Leach * Fast read of the current value that does not allocate if no ID allocated 86338a588eSMike Leach * for the CPU. 87338a588eSMike Leach * 88338a588eSMike Leach * Used in perf context where it is known that the value for the CPU will not 89338a588eSMike Leach * be changing, when perf starts and event on a core and outputs the Trace ID 90338a588eSMike Leach * for the CPU as a packet in the data file. IDs cannot change during a perf 91338a588eSMike Leach * session. 92338a588eSMike Leach * 93338a588eSMike Leach * This function does not take the lock protecting the ID lists, avoiding 94338a588eSMike Leach * locking dependency issues with perf locks. 95338a588eSMike Leach * 96338a588eSMike Leach * @cpu: The CPU index to read. 97338a588eSMike Leach * 98338a588eSMike Leach * return: current value, will be 0 if unallocated. 99338a588eSMike Leach */ 100338a588eSMike Leach int coresight_trace_id_read_cpu_id(int cpu); 101338a588eSMike Leach 102338a588eSMike Leach /** 1037e528778SJames Clark * Version of coresight_trace_id_read_cpu_id() that allows the ID map to operate 1047e528778SJames Clark * on to be provided. 1057e528778SJames Clark */ 1067e528778SJames Clark int coresight_trace_id_read_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map); 1077e528778SJames Clark 1087e528778SJames Clark /** 109338a588eSMike Leach * Allocate a CoreSight trace ID for a system component. 110338a588eSMike Leach * 111338a588eSMike Leach * Unconditionally allocates a Trace ID, without associating the ID with a CPU. 112338a588eSMike Leach * 113338a588eSMike Leach * Used to allocate IDs for system trace sources such as STM. 114338a588eSMike Leach * 115338a588eSMike Leach * return: Trace ID or -EINVAL if allocation is impossible. 116338a588eSMike Leach */ 117338a588eSMike Leach int coresight_trace_id_get_system_id(void); 118338a588eSMike Leach 119338a588eSMike Leach /** 120338a588eSMike Leach * Release an allocated system trace ID. 121338a588eSMike Leach * 122338a588eSMike Leach * Unconditionally release a trace ID allocated to a system component. 123338a588eSMike Leach * 124338a588eSMike Leach * @id: value of trace ID allocated. 125338a588eSMike Leach */ 126338a588eSMike Leach void coresight_trace_id_put_system_id(int id); 127338a588eSMike Leach 128338a588eSMike Leach /* notifiers for perf session start and stop */ 129338a588eSMike Leach 130338a588eSMike Leach /** 131338a588eSMike Leach * Notify the Trace ID allocator that a perf session is starting. 132338a588eSMike Leach * 133*de0029fdSJames Clark * Increase the perf session reference count - called by perf when setting up a 134*de0029fdSJames Clark * trace event. 135338a588eSMike Leach * 136*de0029fdSJames Clark * Perf sessions never free trace IDs to ensure that the ID associated with a 137*de0029fdSJames Clark * CPU cannot change during their and other's concurrent sessions. Instead, 138*de0029fdSJames Clark * this refcount is used so that the last event to finish always frees all IDs. 139338a588eSMike Leach */ 140*de0029fdSJames Clark void coresight_trace_id_perf_start(struct coresight_trace_id_map *id_map); 141338a588eSMike Leach 142338a588eSMike Leach /** 143338a588eSMike Leach * Notify the ID allocator that a perf session is stopping. 144338a588eSMike Leach * 145*de0029fdSJames Clark * Decrease the perf session reference count. If this causes the count to go to 146*de0029fdSJames Clark * zero, then all Trace IDs will be released. 147338a588eSMike Leach */ 148*de0029fdSJames Clark void coresight_trace_id_perf_stop(struct coresight_trace_id_map *id_map); 149338a588eSMike Leach 150338a588eSMike Leach #endif /* _CORESIGHT_TRACE_ID_H */ 151