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/linux/Documentation/devicetree/bindings/access-controllers/
H A Daccess-controllers.yaml4 $id: http://devicetree.org/schemas/access-controllers/access-controllers.yaml#
7 title: Generic Domain Access Controllers
13 Common access controllers properties
15 Access controllers are in charge of stating which of the hardware blocks under
22 controller provided by access-controllers property. In this case, the device
31 Access controllers are typically used to set/read the permissions of a
36 Each node can be a consumer for the several access controllers.
44 Number of cells in an access-controllers specifier;
51 A list of access-controllers names, sorted in the same order as
52 access-controllers entries. Consumer drivers will use
[all …]
/linux/Documentation/input/devices/
H A Dxpad.rst2 xpad - Linux USB driver for Xbox compatible controllers
6 controllers. It has a long history and has enjoyed considerable usage
11 This only affects Original Xbox controllers. All later controller models
14 Rumble is supported on some models of Xbox 360 controllers but not of
15 Original Xbox controllers nor on Xbox One controllers. As of writing
39 unknown controllers.
42 Normal Controllers
77 of buttons, see section 0.3 - Unknown Controllers
82 Unknown Controllers
95 All generations of Xbox controllers speak USB over the wire.
[all …]
/linux/drivers/ata/
H A DKconfig107 comment "Controllers with non-SFF native interface"
143 controllers.
347 This option adds support for ATA controllers with SFF
351 the dawn of time. Almost all PATA controllers have an
352 SFF interface. Many SATA controllers have an SFF interface
355 For users with exclusively modern controllers like AHCI,
363 comment "SFF controllers with custom DMA interface"
369 This option enables support for Pacific Digital ADMA controllers
406 This option adds support for SFF ATA controllers with BMDMA
408 de facto DMA interface for SFF controllers.
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra20-i2c.yaml39 Tegra114 has 5 generic I2C controllers. This controller is very much
52 Tegra124 has 6 generic I2C controllers. These controllers are very
57 Tegra210 has 6 generic I2C controllers. These controllers are very
66 the regular I2C controllers with a few exceptions. The I2C registers
72 Tegra186 has 9 generic I2C controllers, two of which are in the AON
73 (always-on) partition of the SoC. All of these controllers are very
77 Tegra194 has 8 generic I2C controllers, two of which are in the AON
78 (always-on) partition of the SoC. All of these controllers are very
79 similar to those found on Tegra186. However, these controllers have
101 Module reset. This property is optional for controllers in Tegra194,
/linux/Documentation/ABI/testing/
H A Ddebugfs-pcie-ptm6 Complex and Endpoint controllers.
13 Endpoint controllers.
20 Endpoint controllers.
27 Root Complex controllers.
34 Root Complex controllers.
41 Endpoint controllers.
48 Endpoint controllers.
62 Applicable only for Root Complex controllers. PTM context is
H A Dsysfs-bus-pci-drivers-ehci_hcd7 PCI-based EHCI USB controllers (i.e., high-speed USB-2.0
8 controllers) are often implemented along with a set of
9 "companion" full/low-speed USB-1.1 controllers. When a
35 Note: Some EHCI controllers do not have companions; they
38 mechanism will not work with such controllers. Also, it
/linux/include/linux/platform_data/
H A Dtmio.h11 * Some controllers can support a 2-byte block size when the bus width is
16 /* Some controllers can support SDIO IRQ signalling */
23 * Some controllers require waiting for the SD bus to become idle before
35 /* Some controllers have CMD12 automatically issue/non-issue register */
41 /* Some controllers have a 32-bit wide data port register */
44 /* Some controllers allows to set SDx actual clock */
47 /* Some controllers have a CBSY bit */
/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-omap.txt8 - compatible: Should be "ti,omap2430-sdhci" for omap2430 controllers
9 Should be "ti,omap3-sdhci" for omap3 controllers
10 Should be "ti,omap4-sdhci" for omap4 and ti81 controllers
11 Should be "ti,omap5-sdhci" for omap5 controllers
12 Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers
14 Should be "ti,am335-sdhci" for am335x controllers
15 Should be "ti,am437-sdhci" for am437x controllers
/linux/arch/arm/boot/dts/st/
H A Dstm32mp151.dtsi437 access-controllers = <&etzpc 16>;
474 access-controllers = <&etzpc 17>;
509 access-controllers = <&etzpc 18>;
546 access-controllers = <&etzpc 19>;
578 access-controllers = <&etzpc 20>;
604 access-controllers = <&etzpc 21>;
628 access-controllers = <&etzpc 22>;
658 access-controllers = <&etzpc 23>;
688 access-controllers = <&etzpc 24>;
718 access-controllers = <&etzpc 25>;
[all …]
/linux/include/linux/mux/
H A Ddriver.h57 * struct mux_chip - Represents a chip holding mux controllers.
58 * @controllers: Number of mux controllers handled by the chip.
59 * @mux: Array of mux controllers that are handled.
65 unsigned int controllers; member
83 return &mux_chip->mux[mux_chip->controllers]; in mux_chip_priv()
87 unsigned int controllers, size_t sizeof_priv);
93 unsigned int controllers,
/linux/Documentation/devicetree/bindings/phy/
H A Drealtek,usb2phy.yaml16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
22 controllers.
30 The USB architecture includes two XHCI controllers.
38 The USB architecture includes three XHCI controllers.
39 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
46 The USB architecture includes three XHCI controllers.
47 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
54 The USB architecture includes three XHCI controllers.
H A Drealtek,usb3phy.yaml16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
22 controllers.
30 The USB architecture includes three XHCI controllers.
31 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
38 The USB architecture includes three XHCI controllers.
39 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
/linux/arch/arm64/boot/dts/st/
H A Dstm32mp251.dtsi246 access-controllers = <&rifsc 111>;
263 access-controllers = <&rifsc 74>;
279 access-controllers = <&rifsc 75>;
302 access-controllers = <&rifsc 17>;
338 access-controllers = <&rifsc 18>;
377 access-controllers = <&rifsc 23>;
392 access-controllers = <&rifsc 23>;
407 access-controllers = <&rifsc 24>;
422 access-controllers = <&rifsc 24>;
436 access-controllers = <&rifsc 30>;
[all …]
H A Dstm32mp231.dtsi238 access-controllers = <&rifsc 23>;
253 access-controllers = <&rifsc 23>;
268 access-controllers = <&rifsc 24>;
283 access-controllers = <&rifsc 24>;
297 access-controllers = <&rifsc 30>;
309 access-controllers = <&rifsc 32>;
321 access-controllers = <&rifsc 33>;
333 access-controllers = <&rifsc 34>;
345 access-controllers = <&rifsc 35>;
361 access-controllers = <&rifsc 41>;
[all …]
/linux/tools/testing/selftests/bpf/
H A Dcgroup_helpers.c59 static int __enable_controllers(const char *cgroup_path, const char *controllers) in __enable_controllers() argument
67 /* If not controllers are passed, enable all available controllers */ in __enable_controllers()
68 if (!controllers) { in __enable_controllers()
69 snprintf(path, sizeof(path), "%s/cgroup.controllers", in __enable_controllers()
73 log_err("Opening cgroup.controllers: %s", path); in __enable_controllers()
79 log_err("Reading cgroup.controllers: %s", path); in __enable_controllers()
81 } else if (len == 0) { /* No controllers to enable */ in __enable_controllers()
88 bpf_strlcpy(enable, controllers, sizeof(enable)); in __enable_controllers()
110 * enable_controllers() - Enable cgroup v2 controllers
112 * @controllers: List of controllers to enable in cgroup.controllers format
[all …]
/linux/drivers/phy/qualcomm/
H A DKconfig69 with USB3 and DisplayPort controllers on Qualcomm chips.
78 with PCIe controllers on Qualcomm chips.
87 with PCIe controllers on Qualcomm msm8996 chips.
95 with UFS controllers on Qualcomm chips.
103 with USB3 controllers on Qualcomm chips.
124 controllers on Qualcomm chips. This driver supports the high-speed
157 is used with PCIe controllers on Qualcomm IPQ5332 chips. It
215 both HS and SS PHY controllers.
/linux/include/linux/
H A Dreset.h291 * multiple reset controllers.
330 * controllers.
351 * reset controllers.
400 * multiple reset controllers.
601 * Managed reset_control_get_exclusive(). For reset controllers returned
622 * controllers returned from this function, reset_control_assert() +
640 * Managed reset_control_bulk_get_exclusive(). For reset controllers returned
660 * Managed reset_control_get_exclusive_released(). For reset controllers
680 * Managed reset_control_bulk_get_exclusive_released(). For reset controllers
701 * reset controllers returned from this function, reset_control_put() is called
[all …]
/linux/drivers/net/can/spi/
H A DKconfig6 tristate "Holt HI311x SPI CAN controllers"
8 Driver for the Holt HI311x SPI CAN controllers.
11 tristate "Microchip MCP251x and MCP25625 SPI CAN controllers"
14 controllers.
/linux/Documentation/PCI/endpoint/
H A Dpci-endpoint-cfs.rst25 The pci_ep configfs has two directories at its root: controllers and
27 the *controllers* directory and every EPF driver present in the system
32 .. controllers/
38 Every registered EPF driver will be listed in controllers directory. The
94 Every registered EPC device will be listed in controllers directory. The
98 /sys/kernel/config/pci_ep/controllers/
119 | controllers/
H A Dpci-ntb-howto.rst31 # ls /sys/kernel/config/pci_ep/controllers
111 NTB function device should be attached to two PCI endpoint controllers
117 # ln -s controllers/2900000.pcie-ep/ functions/pci-epf-ntb/func1/primary
118 # ln -s controllers/2910000.pcie-ep/ functions/pci-epf-ntb/func1/secondary
120 Once the above step is completed, both the PCI endpoint controllers are ready to
128 field should be populated with '1'. For NTB, both the PCI endpoint controllers
131 # echo 1 > controllers/2900000.pcie-ep/start
132 # echo 1 > controllers/2910000.pcie-ep/start
/linux/drivers/usb/gadget/udc/
H A DKconfig11 # - Some systems have both kinds of controllers.
20 # The order here is alphabetical, except that integrated controllers go
22 # - integrated/SOC controllers first
24 # - discrete ones (including all PCI-only controllers)
30 # Integrated controllers
117 speed USB device controllers, with support for up to 30
119 controller in the OMAP 1611, and should work with controllers
255 # Controllers available in both integrated and discrete versions
273 # Controllers available only in discrete form (and all PCI controllers)
303 controllers having QE or CPM2, given minor tweaks.
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dusb-drd.yaml25 Tells Dual-Role USB controllers that we want to work on a particular
26 mode. In case this attribute isn't passed via DT, USB DRD controllers
34 Tells OTG controllers we want to disable OTG HNP. Normally HNP is the
41 Tells OTG controllers we want to disable OTG SRP. SRP is optional for OTG
47 Tells OTG controllers we want to disable OTG ADP. ADP is optional for OTG
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmsi.txt1 This document describes the generic device tree binding for MSI controllers and
9 those busses to the MSI controllers which they are capable of using,
22 MSI controllers may have restrictions on permitted payloads.
31 MSI controllers:
68 MSI controllers listed in the msi-parent property.
131 * Can generate MSIs to all of the MSI controllers.
/linux/drivers/pinctrl/bcm/
H A DKconfig122 The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
124 the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
127 The Broadcom NSP has two GPIO controllers including the ChipcommonA
132 the ChipcommonG GPIO. Both controllers are supported by this driver.
134 The Broadcom Stingray GPIO controllers are supported by this driver.
136 All above SoCs GPIO controllers support basic PINCONF functions such
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drenesas,dbsc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#
7 title: Renesas DDR Bus Controllers
13 Renesas SoCs contain one or more memory controllers. These memory
14 controllers differ from one SoC variant to another, and are called by

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